Alexander Q Spencer

US Patent:

48232866, Apr 18, 1989

Filed:

Feb 12, 1987

Appl. No.:

7/013847

Inventors:

Leon Lumelsky - Stamford CT
Joe C. St. Clair - Round Rock TX
Robert L. Mansfield - Austin TX
Marc Segre - Rhinebeck NY
Alexander K. Spencer - Austin TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1206

US Classification:

364521

Abstract:

A multichannel data path architecture which assists a host processor in communication with the frame buffer in order to increase the overall system performance. The architecture provides automatic frame buffer data path rearrangement depending on the pixel address and the host data interpretation. It utilizes a minimum of shift registers, accumulators and control circuitry to provide the requisite storage, reconfiguration and frame buffer access functions. The architecture extends bit-blt (bit block transfer) conventional operations in order to provide high quality "antialiased" text and graphics directly in the architecture without requiring the calculation of colors by the host processor. Finally, it assists the "burst" mode update of an arbitrary single plane of a frame buffer, which is especially important when high denisty chips are used for the frame buffer implemenation.