Bryan J Reed

US Patent:

6342430, Jan 29, 2002

Filed:

Apr 13, 2000

Appl. No.:

09/548680

Inventors:

Scott G. Adams - Ithaca NY
Kevin A. Shaw - Ithaca NY
Russell Y. Webb - Ithaca NY
Bryan W. Reed - Ithaca NY
Noel C. MacDonald - Ithaca NY
Timothy J. Davis - Trumansburg NY

Assignee:

Kionix, Inc. - Ithaca NY
Cornell Research Foundation - Ithaca NY

International Classification:

H01L 2176

US Classification:

438424, 438421, 438666, 438 50, 438 52

Abstract:

An isolation process which enhances the performance of silicon micromechanical devices incorporates dielectric isolation segments within the silicon microstructure, which is otherwise composed of an interconnected grid of cantilevered beams. A metal layer on top of the beams provides interconnects and also allows contact to the silicon beams, electrically activating the device for motion or transduction. Multiple conduction paths are incorporated through a metal patterning step prior to structure definition. The invention improves manufacturability of previous processes by performing all lithographic patterning steps on flat topographies, and removing complicated metal sputtering steps required of most high aspect ratio processes. With little modification, the invention can be implemented with in grated circuit fabrication sequences for fully integrated devices.

US Patent:

62394738, May 29, 2001

Filed:

Jan 14, 1999

Appl. No.:

9/231082

Inventors:

Scott G. Adams - Ithaca NY
Kevin A. Shaw - Ithaca NY
Russell Y. Webb - Ithaca NY
Bryan W. Reed - Ithaca NY
Noel C. MacDonald - Ithaca NY
Timothy J. Davis - Trumansburg NY

Assignee:

Kionix, Inc. - Ithaca NY
Cornell Research Foundation Inc. - Ithaca NY

International Classification:

H01L 2984

US Classification:

257419

Abstract:

An isolation process which enhances the performance of silicon micromechanical devices incorporates dielectric isolation segments within the silicon microstructure, which is otherwise composed of an interconnected grid of cantilevered beams. A metal layer on top of the beams provides interconnects and also allows contact to the silicon beams, electrically activating the device for motion or transduction. Multiple conduction paths are incorporated through a metal patterning step prior to structure definition. The invention improves manufacturability of previous processes by performing all lithographic patterning steps on flat topographies, and removing complicated metal sputtering steps required of most high aspect ratio processes. With little modification, the invention can be implemented with integrated circuit fabrication sequences for fully integrated devices.