David H Eppes

US Patent:

6546513, Apr 8, 2003

Filed:

Jun 2, 2000

Appl. No.:

09/586572

Inventors:

Richard Jacob Wilcox - Austin TX
Jason D. Mulig - Austin TX
David Eppes - Austin TX
Michael R. Bruce - Austin TX
Victoria J. Bruce - Austin TX
Rosalinda M. Ring - Austin TX
Paiboon Tangyunyong - Bernalillo NM
Charles F. Hawkins - Bernalillo NM
Arnold Y. Louie - Santa Clara CA

Assignee:

Advanced Micro Devices - Austin TX

International Classification:

G01R 3128

US Classification:

714738

Abstract:

A method and apparatus mechanism for testing data processing devices are implemented. The test mechanism isolates critical paths by correlating a scanning microscope image with a selected speed path failure. A trigger signal having a preselected value is generated at the start of each pattern vector. The sweep of the scanning microscope is controlled by a computer, which also receives and processes the image signals returned from the microscope. The value of the trigger signal is correlated with a set of pattern lines being driven on the DUT. The trigger is either asserted or negated depending the detection of a pattern line failure and the particular line that failed. In response to the detection of the particular speed path failure being characterized, and the trigger signal, the control computer overlays a mask on the image of the device under test (DUT). The overlaid image provides a visual correlation of the failure with the structural elements of the DUT at the level of resolution of the microscope itself.

US Patent:

6576195, Jun 10, 2003

Filed:

Mar 8, 2000

Appl. No.:

09/521260

Inventors:

David Harry Eppes - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G01N 2147

US Classification:

422 8205

Abstract:

Defect analysis of an integrated circuit die is enhanced using a method and system that make possible the detection of defect-related heat generation in the die. According to an example embodiment of the present invention, a semiconductor die having a liquid crystal layer is analyzed by detecting a liquid crystal phase change caused by heating the die. The heating causes a first circuit region and a second circuit region to effect a separate phase change in corresponding areas of the liquid crystal layer. A detector is adapted to use time-lapsed analysis to detect the liquid crystal phase change in the area corresponding to the second circuit region before the corresponding areas cease to be separately detectable.

US Patent:

6599762, Jul 29, 2003

Filed:

Mar 8, 2000

Appl. No.:

09/521627

Inventors:

David Harry Eppes - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 2166

US Classification:

438 14, 438 10, 438 16, 324750, 324753

Abstract:

Defect analysis of an integrated circuit die having an internal heat source is enhanced using a method and system that use the internal heat source to heat the die. According to an example embodiment of the present invention, a semiconductor die having a liquid crystal layer is analyzed by detecting a liquid crystal phase change caused by electrical operation of the die. A first circuit region is electrically operated and used as the primary heat source to generate sufficient heat at a second circuit region to effect a separately viewable phase change in an area of the liquid crystal layer corresponding to the second circuit region. The internal heat source is adapted to cause the liquid crystal phase change without necessarily heating the die with an external heat source. A detector is adapted and used to detect the liquid crystal phase change in the area corresponding to the second circuit region.

US Patent:

6635839, Oct 21, 2003

Filed:

Apr 19, 2001

Appl. No.:

09/838672

Inventors:

Glen P. Gilfeather - Del Valle TX
Srikar V. Chunduri - Austin TX
Brennan V. Davis - Austin TX
David H. Eppes - Austin TX
Victoria Bruce - Austin TX
Michael Bruce - Austin TX
Rosalinda M. Ring - Austin TX
Daniel Stone - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

B07C 500

US Classification:

209576

Abstract:

Semiconductor die analysis is enhanced using a system that is adapted to perturb a die in a test chamber and to detect a response from the die to the perturbation. According to an example embodiment of the present invention, a semiconductor die analysis system includes a test chamber and a docking arrangement adapted to dock with the test chamber. A die is held in the docking arrangement and is presented inside of the test chamber when the docking arrangement is docked with the chamber. Two or more perturbation devices are used to perturb the die, and controller is adapted to control the perturbation. A data acquisition arrangement receives data from the die in response to the perturbation, and the data is used for analyzing the die.

US Patent:

6700659, Mar 2, 2004

Filed:

Apr 19, 2001

Appl. No.:

09/838671

Inventors:

Srikar V. Chunduri - Austin TX
Glen P. Gilfeather - Del Valle TX
Brennan V. Davis - Austin TX
David H. Eppes - Austin TX
Victoria Bruce - Austin TX
Michael Bruce - Austin TX
Rosalinda M. Ring - Austin TX
Daniel Stone - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G01N 2188

US Classification:

3562375

Abstract:

The operability of light-based semiconductor die analysis is enhanced using a method and arrangement that can detect light leakage between a light source and a die. In one example embodiment of the present invention, a light source is directed to a semiconductor analysis arrangement using, for example, a fiber optic cable. The analysis arrangement is adapted to use light from the light source for analyzing the die. A light detection arrangement detects a condition of light leakage from the system and generates a signal representing the condition of light leakage. The generated signal can then be used to control the semiconductor analysis arrangement, such as by deactivating the light source in response to a detected leak, or by allowing the light source to function in response to not detecting a leak.

US Patent:

6815965, Nov 9, 2004

Filed:

Jun 2, 2000

Appl. No.:

09/585921

Inventors:

David Eppes - Austin TX
Thomas J. McKeone - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G01R 3126

US Classification:

324760, 3241581

Abstract:

Substrate removal for analysis of a semiconductor die is enhanced via a method and system for heating the die. According to an example embodiment of the present invention, a plurality of heating elements are formed in a semiconductor die. The die is operated while at least one of the plurality of heating elements heats a portion of the die adjacent the heating element. A response to the heating is detected and used to analyze the die. The present invention makes possible selective heating of the die in a manner that is readily controllable and implemented. Die analysis, including, for example, critical timing path analysis, is enhanced by this ability to controllably heat the die.

US Patent:

6836132, Dec 28, 2004

Filed:

Mar 29, 2002

Appl. No.:

10/113604

Inventors:

Michael R. Bruce - Austin TX
David H. Eppes - Austin TX
Rama R. Goruganthu - Austin TX

Assignee:

Advance Micro Devices, Inc. - Sunnyvale CA

International Classification:

G01R 3128

US Classification:

324765, 324760

Abstract:

A semiconductor device is analyzed and manufactured using a heat-exchange probe. According to an example embodiment of the present invention, a heat-exchange probe is controlled to exchange heat to a portion of a semiconductor device using sub-micron resolution. In one implementation, sub-micron resolution is achieved using a navigational arrangement, such as microscope, adapted to direct light to within about one micron of a target circuit portion on a plane of the device. In another implementation, a physical heat probe tip (e. g. , a metal probe having about a one micron diameter probe tip) is navigated to a selected portion of the device using sub-micron navigational resolution. In each of these implementations, as well as others, the heat exchange is preponderantly confined to within about a one micron radius of a target portion of circuitry on lateral plane of the device. With this approach, heat exchange can be controlled to selectively stimulate circuitry within the device, which is particularly useful in high-density circuit implementations.

US Patent:

6844928, Jan 18, 2005

Filed:

Apr 19, 2001

Appl. No.:

09/838717

Inventors:

Glen P. Gilfeather - Del Valle TX, US
Srikar V. Chunduri - Austin TX, US
Brennan V. Davis - Austin TX, US
David H. Eppes - Austin TX, US
Victoria Bruce - Austin TX, US
Michael Bruce - Austin TX, US
Rosalinda M. Ring - Austin TX, US
Daniel Stone - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G01N 2100

US Classification:

3562375

Abstract:

The operability of light-based semiconductor die analysis is enhanced using a method and arrangement that directs light between a light source and a die. In one example embodiment of the present invention, a light source is directed to a die in a semiconductor analysis arrangement using a fiber optic cable. The analysis arrangement is adapted to use light received via the fiber optic cable to analyze the die. The analysis includes one or more light-based applications, such as stimulating a selected portion of the die with the light and detecting a response therefrom. In this manner, light can be directed to a die in a variety of analysis implementations, such as for analyzing a die in a test chamber.