Gary F Stevens

US Patent:

7812544, Oct 12, 2010

Filed:

Apr 14, 2008

Appl. No.:

12/082817

Inventors:

Louis J. Morales - Somerville MA, US
Gary W. Stevens - Somerville MA, US
John B. Unger - West Islip NY, US

Assignee:

iSine, Inc. - Ronkonkoma NY

International Classification:

H05B 37/02

US Classification:

315209R, 315246, 315291, 315360, 315DIG 4, 315DIG 5

Abstract:

Circuitry, which is compatible with incandescent light dimmers, is disposed within the screwbase of a compact fluorescent light, and sets driving frequencies for a mercury plasma, based, at least in part, on sensing the duty cycle of the incoming AC supply waveform. In this way, existing lighting infrastructure, including phase-cut dimmer circuits for incandescent light bulbs, may be preserved, and incandescent bulbs can be replaced with compact fluorescent lights equipped with circuitry in accordance with the present invention. In a further aspect, the circuitry synchronizes the bulb drive signals with the AC power line frequency.

US Patent:

20110025233, Feb 3, 2011

Filed:

Apr 28, 2010

Appl. No.:

12/769609

Inventors:

Louis J. Morales - Somerville MA, US
Gary W. Stevens - Somerville MA, US
John B. Unger - West Islip NY, US

International Classification:

H05B 37/02

US Classification:

315307

Abstract:

Arc lamps, including low-pressure arc lamps, are coupled to drive circuitry operable to provide drive signals that reduce or eliminate excess current when the lamp arc is struck. The drive circuitry controls the rate at which a lamp can fire by actively controlling the rate the voltage pulse increases. Prior to enabling the drive pulse burst, the frequency is shifted only part of the way towards the normal operating frequency in a single step, then allowed to approach the normal operating frequency in a fashion that is selected based at least in part upon the specific type of lamp being used. Typically, the rate of change of the frequency is linear.

US Patent:

51192926, Jun 2, 1992

Filed:

Jul 21, 1989

Appl. No.:

7/384824

Inventors:

Lauren D. Baker - Westford MA
Gary W. Stevens - Whitinsville MA
William C. Herbst - Franklin MA

Assignee:

Clearpoint Research Corporation - Hopkinton MA

International Classification:

G06F 1336

US Classification:

395725

Abstract:

A first-type bus device is designed for use in a computer system having one or more second-type bus devices. The second-type devices practice a round robin arbitration scheme, but the first type devices do not. According to the round-robin scheme, a second-type device which wins an arbitration asserts its ID on the system bus, each second-type device seeking to arbitrate compares its ID with that asserted by the current bus master, and uses that comparison to determine whether to assert its ID during arbitration in a high or low priority manner. The first-type bus device includes means for assuring that first-type and second-type devices never arbitrate at the same time. During arbitration, first-type devices only assert their ID number in one priority. Unlike second-type devices, they cannot assert their ID either in a high or low priority manner. Each first-type device has means for being given a selectable ID number, but when a first type device becomes bus master, it asserts an ID number which is independent of its selectable ID number.

US Patent:

51014793, Mar 31, 1992

Filed:

Jul 21, 1989

Appl. No.:

7/384246

Inventors:

Lauren D. Baker - Westford MA
Gary W. Stevens - Whitinsville MA
William C. Herbst - Franklin MA

Assignee:

Clearpoint Research Corporation - Hopkinton MA

International Classification:

G06F 304
G06F 1300

US Classification:

395325

Abstract:

A bus device of a first type is designed to work with a bus devices of a second type. A bus device of the second type, when it is a slave in a bus transaction, issues an ACK if it can respond to the command on time, a NO ACK if it can't respond at all, a STALL if it expects to be able to respond with only a short delay, and a RETRY if it expects to be able to respond, but only after a long delay. Slave Bus devices of the second type also monitor the length of time that they assert the STALL signal, and if they assert if for more than a predetermined period, they replace the STALL signal with a RETRY. Bus devices of the second type, when they are master in a bus transaction, respond to a NO ACK by terminating a transaction in one way and to a RETRY by terminating the transaction in a different way. The bus devices of the first type provided by the present invention, although they are designed for use in conjunction with the second type bus devices, have no means for replacing a STALL with a RETRY when they are slaves in a bus transaction, and no means for responding to a NO ACK and a RETRY by terminating a transaction in a different manner when they are masters in a bus transaction.

US Patent:

51485451, Sep 15, 1992

Filed:

Jul 21, 1989

Appl. No.:

7/384128

Inventors:

William C. Herbst - Franklin MA
Lauren D. Baker - Westford MA
Gary W. Stevens - Whitinsville MA

Assignee:

Clearpoint Research Corporation - Hopkinton MA

International Classification:

G06F 1336
G06F 1214

US Classification:

395725

Abstract:

A bus device of a first type uses a first arbitration protocol. The first-type device is designed for use in a computer system having a communications bus, and one or more other bus devices connected to the bus, including possible first-type bus devices which also use the first arbitration protocol and one or more second-type bus devices which use a second, different, arbitration protocol. The first-type bus device includes a protocol specific memory for storing information; means for monitoring the bus to determine whether the current bus master of the bus arbitrated in the manner of the first or second arbitration protocols; and means for denying the current bus master the ability to access information stored in the protocol specific memory if the means for monitoring determines the bus master arbitrated according to the second arbitration protocol.