Michael K Leung

US Patent:

6384423, May 7, 2002

Filed:

Feb 7, 2000

Appl. No.:

09/499149

Inventors:

George L. Kerber - San Diego CA
Michael Leung - Lomita CA

Assignee:

TRW Inc. - Redondo Beach CA

International Classification:

H01L 2906

US Classification:

257 30, 257 34, 257 39

Abstract:

The invention is a process for reducing roughness of a surface of a superconductor material ( ) having an undesirable surface roughness ( and ) and a trilayer superconductor integrated circuit ( ). The process for reducing roughness of a surface of superconductor material having an undesirable surface roughness includes coating the surface with an oxide layer ( ) to fill the undesirable surface roughness and to produce an exposed oxide surface ( ) with a roughness less than the surface roughness; and etching the exposed oxide surface to remove a thickness of the oxide layer followed by removing at least a portion of the oxide layer filling the undesirable surface roughness and a portion of the surface of the superconductor material to produce an exposed etched surface ( ) comprised of at least the superconductor material which has a surface roughness less than the undesirable surface roughness.

US Patent:

6553541, Apr 22, 2003

Filed:

Apr 5, 2000

Appl. No.:

09/544241

Inventors:

Borivoje Nikolic - Berkeley CA
Leo Fu - San Jose CA
Michael Leung - Sunnyvale CA
Vojin G. Oklobdzija - Berkeley CA
Richard Yamasaki - late of Torrance CA

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H03M 1341

US Classification:

714795, 360 40

Abstract:

Reduction of the complexity of a Viterbi-type sequence detector is disclosed. It was based on elimination of less probably taken branches in the trellis. The method is applied to the design of the E PR4 channel with 8/9 rate sliding block trellis code. Coding, by itself eliminates two states by coding constraints, and the disclosed method reduces the number of required ACS units from 14 to 11, while reducing their complexity as well. For the implementation of E PR4 detection, 4 4-way, 3 3-way, 3 2-way and one 1-way ACSs are needed. System simulations show no BER performance drop at common SNRs when compared with a full 16-state E PR4 implementation in magnetic disk drives.

US Patent:

7037830, May 2, 2006

Filed:

Sep 29, 2000

Appl. No.:

09/675627

Inventors:

Michael Rumer - Santa Clara CA, US
Jack Griswold - San Jose CA, US
Tom Dorsh - Santa Clara CA, US
Michael Kwok Leung Ng - Daly City CA, US
David E. Reedy - Fremont CA, US
Paul D. Healey - Newton MA, US
Michal Danek - Sunnyvale CA, US
Reed W. Rosenberg - Gilroy CA, US

Assignee:

Novellus Systems, Inc. - San Jose CA

International Classification:

H01L 21/441
H01L 21/445

US Classification:

438656, 438683, 438688

Abstract:

A physical vapor deposition sputtering process for enhancing the preferred orientation of a titanium layer uses hydrogen before or during the deposition process. Using the oriented titanium layer as a base layer for a titanium, titanium nitride, aluminum interconnect stack results in formation of an aluminum layer with predominant crystallographic orientation which provides enhanced resistance to electromigration. In one process, a mixture of an inert gas, usually argon, and hydrogen is used as the sputtering gas for PVD deposition of titanium in place of pure argon. Alternatively, titanium is deposited in a two-step process in which an initial burst of hydrogen is introduced into the reaction chamber in a separate, first step. Pure argon is used as the sputtering gas for the titanium deposition in a second step. The method is broadly applicable to the deposition of metallization layers.

US Patent:

61103926, Aug 29, 2000

Filed:

Sep 18, 1998

Appl. No.:

9/157069

Inventors:

George L. Kerber - San Diego CA
Michael Leung - Lomita CA

Assignee:

TRW Inc. - Redondo Beach CA

International Classification:

C23F 100
B44C 122

US Classification:

216 3

Abstract:

The invention is a process for reducing roughness of a surface of a superconductor material (23) having an undesirable surface roughness (30 and 32) and a trilayer superconductor integrated circuit (100). The process for reducing roughness of a surface of superconductor material having an undesirable surface roughness includes coating the surface with an oxide layer (40) to fill the undesirable surface roughness and to produce an exposed oxide surface (42) with a roughness less than the surface roughness; and etching the exposed oxide surface to remove a thickness of the oxide layer followed by removing at least a portion of the oxide layer filling the undesirable surface roughness and a portion of the surface of the superconductor material to produce an exposed etched surface (44) comprised of at least the superconductor material which has a surface roughness less than the undesirable surface roughness.