Mohammed T Hassan

US Patent:

6587378, Jul 1, 2003

Filed:

Dec 13, 2001

Appl. No.:

10/021824

Inventors:

Mohammed A. Hassan - Sugar Land TX
Robert M. Crosby - Sugar Land TX
Clyde F. Dunn - Sugar Land TX
Andrew M. Love - Austin TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11C 1606

US Classification:

3651852, 36518518, 36518521, 36518525

Abstract:

In a Flash memory unit, the storage of a logic signal in the memory cells is determined by performing a READ operation. The NORMAL READ operation requires that the floating gate store an amount of charge Q above which a logic â0â is identified and below which a logic â1â is identified as being stored in the memory cell. A second level of charge Q stored on the floating gate is used in a TEST READ operation. The stored charge Q is greater than the stored charge Q , but less than the charge stored on the floating gate as the result of a WRITE operation. The result of a TEST READ operation is compared with a NORMAL READ operation of a memory cell. When the logic state identified by the TEST READ operation and the NORMAL READ operation are not the same, the charge on the cell is determined to have decayed below a prescribed level and the memory cell is refreshed to the level that is present during a WRITE operation.