Roger W Sturgeon

US Patent:

6795955, Sep 21, 2004

Filed:

Mar 15, 2002

Appl. No.:

10/098713

Inventors:

Kevin D. MacLean - Los Gatos CA
Roger W. Sturgeon - Fort Lauderdale FL

Assignee:

Numerical Technologies - San Jose CA

International Classification:

G06F 1750

US Classification:

716 10, 716 21, 430 5, 378 35

Abstract:

One embodiment of the invention provides a system for speeding up processing of a layout of an integrated circuit that has been divided into cells. The system operates by determining if a target cell in the layout is identical to a preceding cell for which there exists a previously calculated solution by comparing an identifier created from the target cell with an identifier created from the preceding cell. If the target cell is identical to a preceding cell, the system uses the previously calculated solution as a solution for the target cell. Otherwise, if the target cell is not identical to the preceding cell, the system processes the target cell to produce the solution for the target cell. Note that this approach can also be used for a number of different processes, such as distributed fracturing or optical proximity correction.

US Patent:

7386433, Jun 10, 2008

Filed:

Mar 15, 2002

Appl. No.:

10/098714

Inventors:

Kevin D. MacLean - Los Gatos CA, US
Roger W. Sturgeon - Fort Lauderdale FL, US

Assignee:

Synopsys, Inc. - Moutain View CA

International Classification:

G06F 17/50

US Classification:

703 14, 716 2, 716 5, 716 11

Abstract:

One embodiment of the invention provides a system for speeding up an iterative process that simulates and, if necessary, corrects a layout of a target cell within an integrated circuit so that a simulated layout of the target cell matches a desired layout for the target cell. The system operates by determining if the target cell is similar to a preceding cell for which there exists a previously calculated solution. If so, the system uses the previously calculated solution as an initial input to the iterative process that produces the solution for the target cell.

US Patent:

7987084, Jul 26, 2011

Filed:

Apr 24, 2008

Appl. No.:

12/109178

Inventors:

Kevin D. MacLean - Los Gatos CA, US
Roger W. Sturgeon - Fort Lauderdale FL, US

Assignee:

Synopsys, Inc. - Mountain View CA

International Classification:

G06F 17/50
G06G 7/62

US Classification:

703 13, 703 14, 716100, 716118, 716119, 716139

Abstract:

One embodiment of the invention provides a system for speeding up an iterative process that simulates and, if necessary, corrects a layout of a target cell within an integrated circuit so that a simulated layout of the target cell matches a desired layout for the target cell. The system operates by determining if the target cell is similar to a preceding cell for which there exists a previously calculated solution. If so, the system uses the previously calculated solution as an initial input to the iterative process that produces the solution for the target cell.

US Patent:

44929560, Jan 8, 1985

Filed:

Sep 13, 1982

Appl. No.:

6/417684

Inventors:

Arthur J. Collmeyer - Saratoga CA
Jeffrey H. Hoel - Sunnyvale CA
Paul F. King - LaJolla CA
Donald O. Stanley - San Jose CA
Roger Sturgeon - Santa Cruz CA

Assignee:

Calma Company - Sunnyvale CA

International Classification:

G09G 116

US Classification:

340723

Abstract:

A graphics display system is disclosed including a memory circuit for storing vector data representing a graphics image, a raster memory circuit for rasterizing the vector data into a second memory for storage, and a processor for controlling the operation of the vector memory and raster memory circuits. The raster data can be displayed on a suitable cathode ray tube monitor, thereby displaying the graphics image on the monitor.

US Patent:

44918364, Jan 1, 1985

Filed:

Sep 13, 1982

Appl. No.:

6/417647

Inventors:

Arthur J. Collmeyer - Saratoga CA
Jeffrey H. Hoel - Sunnyvale CA
Paul F. King - LaJolla CA
Donald O. Stanley - San Jose CA
Roger Sturgeon - Santa Cruz CA

Assignee:

Calma Company - Sunnyvale CA

International Classification:

G09G 116

US Classification:

340747

Abstract:

A graphics display system is disclosed including a memory circuit for storing vector data representing a graphics image, a raster memory circuit for rasterizing the vector data into a second memory for storage, and a processor for controlling the operation of the vector memory and raster memory circuits. The raster data can be displayed on a suitable cathode ray tube monitor, thereby displaying the graphics image on the monitor.

US Patent:

44969449, Jan 29, 1985

Filed:

Sep 13, 1982

Appl. No.:

6/417637

Inventors:

Arthur J. Collmeyer - Saratoga CA
Jeffrey H. Hoel - Sunnyvale CA
Paul F. King - LaJolla CA
Donald O. Stanley - San Jose CA
Roger Sturgeon - Santa Cruz CA

Assignee:

Calma Company - Sunnyvale CA

International Classification:

G09G 100

US Classification:

340723

Abstract:

A graphics display system is disclosed including a memory circuit for storing vector data representing a graphics image, a raster memory circuit for rasterizing the vector data into a second memory for storage, and a processor for controlling the operation of the vector memory and raster memory circuits. The raster data can be displayed on a suitable cathode ray tube monitor, thereby displaying the graphics image on the monitor.