Ronald Ted Christopherson

US Patent:

6510545, Jan 21, 2003

Filed:

Jan 19, 2000

Appl. No.:

09/488915

Inventors:

Gin S. Yee - Sunnyvale CA
Ronald T. Christopherson - San Bruno CA

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G06F 1750

US Classification:

716 12, 716 13, 716 14, 716 15, 716 16

Abstract:

An automated shielding tool, algorithm, and design methodology for shielding integrated circuits is disclosed herein. This is accomplished by inserting VDD and VSS wire proximate to signal wires on the same metal layer. The noise issues for dynamic circuits is described along with the benefits and costs of wire shielding. The methodology of the shield tool is a systematic approach for dealing with noise due to capacitive and inductive coupling.