Stephan R Gaskins

age ~44

from Austin, TX

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Also known as:

Stephan Richardson
Stephanie R Gaskins
Tephan Gaskins

Phone and address:: 1113 22Nd 1/2 St, Austin, TX 78705

Connected to:

Stephan Gaskins Phones & Addresses

1113 22Nd 1/2 St, Austin, TX 78705
4701 Duval St, Austin, TX 78751 • (512)3800490
Ipswich, MA
Durham, NC

Work

Company:

Centaur technology
Position:

Design verification engineer

Education

Degree:

BSE
School / High School:

Duke University
1997 to 2001
Specialities:

Electrical Enginnering

Skills

Verilog • Ruby • Microprocessors • Rtl Design • Microarchitecture • Logic Design • Computer Architecture • Linux • Processors • Functional Verification • Embedded Systems

Industries

Computer Hardware

Resumes

Design Verification Team Lead

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Location:

Austin, TX

Industry:

Computer Hardware

Work:

Centaur Technology
Design Verification Engineer

Education:

Duke University 1997 - 2001
BSE, Electrical Enginnering

Skills:

Verilog
Ruby
Microprocessors
Rtl Design
Microarchitecture
Logic Design
Computer Architecture
Linux
Processors
Functional Verification
Embedded Systems

Us Patents

Microprocessor Capable Of Dynamically Reducing Its Power Consumption In Response To Varying Operating Temperature
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US Patent:

7698583, Apr 13, 2010
Filed:

Jun 11, 2007
Appl. No.:

11/761044
Inventors:

Darius D. Gaskins - Austin TX, US
Stephan Gaskins - Austin TX, US
Assignee:

VIA Technologies, Inc. - Taipei
International Classification:

G06F 1/00
G06F 1/26
G06F 1/32
US Classification:

713300, 713320, 713322
Abstract:

A microprocessor capable of dynamically reducing its power consumption based on its varying operating temperature includes a temperature sensor that monitors the microprocessor's operating temperature and a control circuit that includes operating point data. The operating point data includes a first voltage at which the microprocessor may reliably operate at a frequency and at a first temperature, and a second voltage at which the microprocessor may reliably operate at the frequency and at a second temperature. The second temperature is less than the first temperature and the second voltage is less than the first voltage. The control circuit causes the microprocessor to operate at the frequency and at the second voltage rather than at the first voltage when the operating temperature drops below the second temperature while operating at the frequency and at the first voltage.

Microprocessor Capable Of Dynamically Increasing Its Performance In Response To Varying Operating Temperature
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US Patent:

7774627, Aug 10, 2010
Filed:

Jun 11, 2007
Appl. No.:

11/761096
Inventors:

Darius D. Gaskins - Austin TX, US
Stephan Gaskins - Austin TX, US
Assignee:

VIA Technologies, Inc. - Taipei
International Classification:

G06F 1/32
US Classification:

713300, 713320, 713322, 713600
Abstract:

A temperature sensor in a microprocessor monitors its operating temperature Operating point data includes a first temperature being the maximum temperature at which the microprocessor will reliably operate at a first frequency and first voltage, the first frequency being the maximum frequency at which the microprocessor will reliably operate at the first temperature and the first voltage. Operating point data also includes a second temperature at which the microprocessor will reliably operate at a second frequency and a second voltage, the second frequency being greater than the first frequency and the second temperature less than the first temperature. A control circuit causes the microprocessor to operate at the second voltage and frequency rather than the first voltage and frequency in response to detecting that while operating at the first voltage and the first frequency the operating temperature dropped below the second temperature.

Microprocessor That Performs Adaptive Power Throttling
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US Patent:

8135970, Mar 13, 2012
Filed:

Mar 12, 2009
Appl. No.:

12/403195
Inventors:

Darius D. Gaskins - Austin TX, US
Stephan Gaskins - Austin TX, US
Assignee:

VIA Technologies, Inc. - New Taipei
International Classification:

G06F 1/00
US Classification:

713322, 713300
Abstract:

A microprocessor that performs adaptive power throttling includes a calculation unit that calculates an average power consumed by the microprocessor over a most recent predetermined sample time and determines whether the average power is less than a predetermined maximum power value. A power management unit controls the microprocessor to conditionally operate at a predetermined frequency if the average power is less than the predetermined maximum power value. The predetermined frequency is a frequency at which the microprocessor may consume more than the predetermined maximum power value. The predetermined maximum power value and sample time are specified to achieve power and/or thermal design goals of a system in which the microprocessor operates. The predetermined maximum power and/or sample time values are programmable by system software. To maintain a running average power value, a counter is incremented, both in sleeping and running states, by different increments depending upon the current performance point.

Microprocessor That Performs Adaptive Power Throttling
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US Patent:

8176347, May 8, 2012
Filed:

Feb 13, 2012
Appl. No.:

13/371626
Inventors:

Darius D. Gaskins - Austin TX, US
Stephan Gaskins - Austin TX, US
Assignee:

VIA Technologies, Inc. - New Taipei
International Classification:

G06F 1/00
US Classification:

713322, 713300
Abstract:

A microprocessor that performs adaptive power throttling includes a calculation unit configured to calculate an average power consumed by the microprocessor over a most recent predetermined sample time and to determine whether the average power is less than a predetermined maximum power value. A power management unit controls the microprocessor to conditionally operate at a predetermined frequency if the average power is less than the predetermined maximum power value. The predetermined frequency is a frequency at which the microprocessor may consume more than the predetermined maximum power value. The power management unit controls the microprocessor to operate at the predetermined frequency only if the microprocessor was most recently instructed by system software to operate at a highest frequency instructable by the system software. The highest frequency instructable by the system software is less than the predetermined frequency.

Detection Of Uncorrectable Re-Grown Fuses In A Microprocessor
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US Patent:

8276032, Sep 25, 2012
Filed:

Mar 8, 2010
Appl. No.:

12/719260
Inventors:

G. Glenn Henry - Austin TX, US
Darius D. Gaskins - Austin TX, US
Stephan Gaskins - Austin TX, US
Assignee:

VIA Technologies, Inc. - New Taipei
International Classification:

G01R 31/28
US Classification:

714732
Abstract:

A microprocessor includes a first plurality of fuses, a predetermined number of which are selectively blown. Control values are provided from the first plurality of fuses to circuits of the microprocessor to control operation of the microprocessor. The microprocessor also includes a second plurality of fuses, blown with the predetermined number of the first plurality of fuses that are blown. In response to being reset, the microprocessor is configured to: read the first plurality of fuses and count a number of them that are blown; read the predetermined number from the second plurality of fuses; compare the counted number with the predetermined number read from the second plurality of fuses; and prevent itself from fetching and executing user program instructions if the number counted from reading the first plurality of fuses does not equal the predetermined number read from the second plurality of fuses.

Detection Of Fuse Re-Growth In A Microprocessor
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US Patent:

8281223, Oct 2, 2012
Filed:

Mar 8, 2010
Appl. No.:

12/719322
Inventors:

Darius D. Gaskins - Austin TX, US
Stephan Gaskins - Austin TX, US
Assignee:

VIA Technologies, Inc. - New Taipei
International Classification:

G11C 29/00
G11C 17/18
US Classification:

714764, 3652257
Abstract:

A microprocessor includes a first plurality of fuses, a predetermined number of which are selectively blown. Control values are provided from the fuses to circuits of the microprocessor to control operation thereof. A second plurality of fuses are blown with the predetermined number of the first plurality of fuses that are blown and a Boolean complement of the predetermined number. In response to being reset, the microprocessor: reads the predetermined number and the Boolean complement of the predetermined number from the second plurality of fuses, Boolean complements the predetermined number read from the second plurality of fuses to generate a result, compares the result with the Boolean complement of the predetermined number read from the second plurality of fuses, and prevent itself from fetching and executing user program instructions if the result does not equal the Boolean complement of the predetermined number read from the second plurality of fuses.

Multicore Processor Power Credit Management To Allow All Processing Cores To Operate At Elevated Frequency
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US Patent:

8615672, Dec 24, 2013
Filed:

Jun 10, 2011
Appl. No.:

13/157555
Inventors:

G. Glenn Henry - Austin TX, US
Darius D. Gaskins - Austin TX, US
Stephan Gaskins - Austin TX, US
Assignee:

VIA Technologies, Inc. - New Taipei
International Classification:

G06F 1/00
G06F 11/30
US Classification:

713340, 713300, 713310, 713320, 713322, 713323, 713330
Abstract:

A microprocessor includes two or more processing cores each configured to determine, at each of succeeding instances in time, an amount of energy consumed by the microprocessor during a period preceding the instance in time. The period is predetermined. Each core also operates at a frequency above a predetermined frequency in response to determining the amount of energy consumed is less than a predetermined amount of energy. All of the cores may operate above the predetermined frequency simultaneously until one of the cores determines the microprocessor has consumed more than the predetermined amount of energy during the period preceding the instance in time. The predetermined frequency may be: a frequency at which all the cores can operate over the predetermined period without the microprocessor consuming more than the predetermined amount of energy, or alternatively the maximum frequency at which system software may request the cores to operate.

Multicore Processor Power Credit Management In Which Multiple Processing Cores Use Shared Memory To Communicate Individual Energy Consumption
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US Patent:

20120005514, Jan 5, 2012
Filed:

Jun 10, 2011
Appl. No.:

13/157436
Inventors:

G. Glenn Henry - Austin TX, US
Darius D. Gaskins - Austin TX, US
Stephan Gaskins - Austin TX, US
Assignee:

VIA TECHNOLOGIES, INC. - New Taipei City
International Classification:

G06F 1/28
US Classification:

713340
Abstract:

A microprocessor includes two or more processing cores each configured to compute a first value in response to detecting a power event. The first value represents an amount of energy the core consumed during a time interval leading up to the event. The length of the time interval is predetermined. Each core reads from the memory one or more second values that represent an amount of energy the other cores consume during approximately the time interval. The second values were previously computed and written to the memory by the other cores. Each core adjusts its operating frequency based on the first and second values. The predetermined frequency may be: a frequency at which all the cores can operate over the predetermined length of time without the microprocessor consuming more than the predetermined amount of energy, or alternatively the maximum frequency at which system software may request the cores to operate.