Niall Kearney - Dublin, IE Wayne Shepherd - Chandler AZ, US
Assignee:
Freescale Semiconductor, Inc. - Austin TX
International Classification:
H01Q 11/12
US Classification:
455118, 455255
Abstract:
A wireless communication unit comprises a frequency generation circuit employing a phase locked loop (PLL) circuit comprising a voltage controlled oscillator having a modulation port for directly modulating a signal output from the voltage controlled oscillator. The voltage controlled oscillator is operably coupled to at least one switch and a capacitor bank comprising one or more varactors. A controller is arranged to switch in one or more varactors associated with the modulation port of the phase locked loop circuit to provide an inverse cubic relationship to the direct modulated signal. In addition, or alternatively, the phase locked loop (PLL) circuit may comprise a voltage controlled oscillator having a tuning port for controlling a frequency of a signal output from the voltage controlled oscillator. The controller here is arranged to switch in one or more varactors associated with the tuning port of the phase locked loop circuit in an inverse square relationship.
Frequency Synthesizer With Improved Priority Channel Switching
Jose I. Suarez - Miami FL James S. Irwin - Ft. Lauderdale FL Wayne P. Shepherd - Sunrise FL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03L 700
US Classification:
331 1A
Abstract:
A frequency synthesizer is provided including a reference frequency generator coupled to one input of a phase detector. The output of the phase detector is coupled via a pair of alternatingly connected filters through a voltage controlled oscillator and a divider circuit to the remaining input of the phase detector to form a phase locked loop. The first filter of the pair is designated for operation on a main channel frequency while the remaining filter is designated for operation on a priority channel frequency. The capacitive elements of each respective filter remain fully charged up for operation on their respective frequencies and thus when such filters are alternately switched between to change frequency from the main channel to the priority channel, the capacitive elements need not be charged to new levels to accommodate such frequency change. Thus, switching between a main channel and a priority channel is accomplished in a minimal amount of time with a significant reduction in frequency synthesizer energy requirements.
Varactor Tuning Circuit Having Plural Selectable Bias Voltages
Ralph T. Enderby - Sunrise FL Enrique Ferrer - Miami FL Wayne P. Shepherd - Sunrise FL
Assignee:
Motorola Inc. - Schaumburg IL
International Classification:
H03B 508 H03H 512 H03L 718
US Classification:
331 36C
Abstract:
A variable capacitance circuit includes a varactor having an anode side and a cathode side. A first variable bias voltage is applied to one of the sides and one of a plurality of voltages is applied as a second bias voltage to the other side for controlling the capacitance of the varactor. A voltage multiplier circuit connected to a voltage divider network is used for supplying the plurality of voltages. A decoder is responsive to input signals for selecting and applying one of the multiple voltage outputs. The variable capacitance circuit is used in a voltage controlled oscillator of a frequency synthesizer for providing extended frequency range.
Wayne P. Shepherd - Sunrise FL Darrell E. Davis - Sunrise FL Frederick L. Martin - Gainesville FL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03C 309
US Classification:
332127
Abstract:
A frequency synthesizer (10) for providing a modulated output signal (fo) includes a reference frequency signal (fr) and a voltage controlled oscillator (14). For dividing the frequency of the output signal from the voltage controlled oscillator (14) by a divisor, a programmable divider (16) is coupled to the output of the voltage controlled oscillator (14). To produce a phase-locked loop in which the frequency of the output signal from the voltage controlled oscillator (14) is equal to the frequency of the reference frequency (fr) signal multiplied by the divisor, a phase detector (12 ) having a first input coupled to the reference frequency signal (fr), a second input coupled to the output of the programmable divider (16), and an output coupled to the input of the voltage controlled oscillator (14) is also provided. A first integrator (24) for integrating a modulating signal provides an integrated signal and a first control signal. Similarly, a second integrator (25) coupled to the first integrator (24) for integrating the integrated signal provides a second control signal.
James S. Irwin - Bastrop TX Wayne P. Shepherd - Sunrise FL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03C 309 H03L 7093
US Classification:
332128
Abstract:
A frequency synthesizer for providing a modulated output signal includes a phase comparator, a loop filter, and a voltage controlled oscillator (VCO). The phase comparator receives a reference input signal and a signal related to the VCO output, and generates a control current. A modulation circuit receives a modulation signal and provides both a modulation current and a modulation voltage. The modulation current is summed with the control current at one input of the loop filter, while the modulation voltage is applied to a second input of the loop filter. The VCO is controlled by the output of the loop filter to produce the modulated output signal.
Fractional-N Synthesizer Having Modulation Spur Compensation
Wayne P. Shepherd - Sunrise FL Darrell E. Davis - Sunrise FL Wan F. Tay - Coral Springs FL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03C 300 H03L 7197
US Classification:
332128
Abstract:
A synthesizer circuit with spur compensation utilizes fractional division in the synthesizer loop. The fractional divider includes means for compensating the spurs when the fractional numerator N=0. The synthesizer includes means for selecting a reference divisor R such that a non zero value of fractional numerator is produced and such that the generated spurs fall below the side band noise limits of the synthesizer's voltage controlled oscillator.
A phase locked loop (100) with a sample and hold phase detector (106) with adjustable gain. A switching circuit adjusts the slew rate of the phase detector by either introducing additional ramp capacitance (122) in the phase detector or by increasing the current for charging the ramp capacitor (116).
Bailey K Ashford Public School 287 Brooklyn NY 1959-1964, Clinton Hill Public School 20 Brooklyn NY 1964-1965, Ronald E. McNair Public School 147 Cambria Heights NY 1965-1966