Chao Shih Liu
age ~63
from Danville, CA
- Also known as:
-
- Chao S Liu
- Chao Shin Liu
- Chao Hui Liu
- Chao Shin Liuchao
- Shih Liu Chao
- Chaoshih Liu
- Shih Liu
- Shi H Liu
- Shin Liu Chao
- Chaoshin Liu
- Phone and address:
- 453 Saint Regis Dr, Danville, CA 94526
Chao Liu Phones & Addresses
- 453 Saint Regis Dr, Danville, CA 94526
- Gilbert, AZ
- San Ramon, CA
- Walnut Creek, CA
- Scottsdale, AZ
- San Bruno, CA
- Seattle, WA
- Spokane, WA
- Pullman, WA
Us Patents
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Methods And Devices For Forming Nanostructure Monolayers And Devices Including Such Monolayers
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US Patent:7776758, Aug 17, 2010
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Filed:Jul 28, 2006
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Appl. No.:11/495188
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Inventors:Xiangfeng Duan - Mountain View CA, US
Chao Liu - San Jose CA, US -
Assignee:Nanosys, Inc. - Palo Alto CA
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International Classification:H01L 21/31
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US Classification:438758, 438128, 438507, 438509, 977891, 257E21209
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Abstract:Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e. g. , memory devices).
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Methods And Devices For Forming Nanostructure Monolayers And Devices Including Such Monolayers
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US Patent:7968273, Jun 28, 2011
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Filed:Jul 27, 2007
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Appl. No.:11/881739
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Inventors:Jian Chen - Mountain View CA, US
Xiangfeng Duan - Mountain View CA, US
Chao Liu - San Jose CA, US
Madhuri L. Nallabolu - Sunnyvale CA, US
J. Wallace Parce - Palo Alto CA, US
Srikanth Ranganathan - Mountain View CA, US -
Assignee:Nanosys, Inc. - Palo Alto CA
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International Classification:G03F 7/26
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US Classification:430311, 430328, 430394, 430330
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Abstract:Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e. g. , memory devices). Methods for protecting nanostructures from fusion during high temperature processing are also provided.
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Electronic Grade Metal Nanostructures
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US Patent:7976646, Jul 12, 2011
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Filed:Aug 18, 2006
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Appl. No.:11/506769
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Inventors:Srikanth Ranganathan - Mountain View CA, US
Paul Bernatis - Sunnyvale CA, US
Joel Gamoras - Vallejo CA, US
Chao Liu - San Jose CA, US
J. Wallace Parce - Palo Alto CA, US -
Assignee:Nanosys, Inc. - Palo Alto CA
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International Classification:C22C 5/04
B32B 15/02 -
US Classification:148430, 420462, 428546
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Abstract:Methods for producing electronic grade metal nanostructures having low levels of contaminants are provided. Monolayer arrays, populations, and devices including such electronic grade nanostructures are described. In addition, novel methods and compositions for production of Group 10 metal nanostructures and for production of ruthenium nanostructures are provided, along with methods for recovering nanostructures from suspension.
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Methods And Devices For Forming Nanostructure Monolayers And Devices Including Such Monolayers
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US Patent:8507390, Aug 13, 2013
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Filed:Jun 29, 2010
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Appl. No.:12/803568
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Inventors:Jian Chen - Sunnyvale CA, US
Karen Chu Cruden - Pleasanton CA, US
Xiangfeng Duan - Mountain View CA, US
Chao Liu - San Jose CA, US
J. Wallace Parce - Palo Alto CA, US -
Assignee:Sandisk Corporation - Milpitas CA
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International Classification:H01L 21/3105
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US Classification:438782, 438128, 438674, 977845, 977855, 257E21241
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Abstract:Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e. g. , memory devices).
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Methods And Devices For Forming Nanostructure Monolayers And Devices Including Such Monolayers
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US Patent:8558304, Oct 15, 2013
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Filed:Apr 29, 2011
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Appl. No.:13/098082
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Inventors:Jian Chen - Sunnyvale CA, US
Xiangfeng Duan - Los Angeles CA, US
Chao Liu - San Jose CA, US
Madhuri Nallabolu - Sunnyvale CA, US
J. Wallace Parce - Palo Alto CA, US
Srikanth Ranganathan - Mountain View CA, US -
Assignee:SanDisk Corporation - Milpitas CA
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International Classification:H01L 29/792
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US Classification:257325, 257314, 257315, 257406, 257E29039, 438311, 438507, 438509, 438128, 977891
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Abstract:Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e. g. , memory devices). Methods for protecting nanostructures from fusion during high temperature processing are also provided.
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Post-Deposition Encapsulation Of Nanostructures: Compositions, Devices And Systems Incorporating Same
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US Patent:20060040103, Feb 23, 2006
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Filed:Jun 7, 2005
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Appl. No.:11/147670
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Inventors:Jeffery Whiteford - Belmont CA, US
Rhett Brewer - Sunnyvale CA, US
Mihai Buretea - San Francisco CA, US
Jian Chen - Mountain View CA, US
Karen Cruden - Pleasanton CA, US
Xiangfeng Duan - Mountain View CA, US
William Freeman - San Mateo CA, US
David Heald - Solvang CA, US
Francisco Leon - Palo Alto CA, US
Chao Liu - San Jose CA, US
Andreas Meisel - San Francisco CA, US
Kyu Min - San Jose CA, US
J. Parce - Palo Alto CA, US
Erik Scher - San Francisco CA, US -
Assignee:NANOSYS, Inc. - Palo Alto CA
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International Classification:B32B 5/16
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US Classification:428403000
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Abstract:Ligand compositions for use in preparing discrete coated nanostructures are provided, as well as the coated nanostructures themselves and devices incorporating same. Methods for post-deposition shell formation on a nanostructure and for reversibly modifying nanostructures are also provided. The ligands and coated nanostructures of the present invention are particularly useful for close packed nanostructure compositions, which can have improved quantum confinement and/or reduced cross-talk between nanostructures.
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Post-Deposition Encapsulation Of Nanostructures: Compositions, Devices And Systems Incorporating Same
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US Patent:20080032134, Feb 7, 2008
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Filed:Feb 13, 2007
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Appl. No.:11/706730
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Inventors:Jeffery Whiteford - Belmont CA, US
Rhett Brewer - Sunnyvale CA, US
Mihai Buretea - San Francisco CA, US
Jian Chen - Mountain View CA, US
Karen Cruden - Pleasanton CA, US
Xiangfeng Duan - Mountain View CA, US
William Freeman - San Mateo CA, US
David Heald - Solvang CA, US
Francisco Leon - Palo Alto CA, US
Chao Liu - San Jose CA, US
Andreas Meisel - San Francisco CA, US
Kyu Min - San Jose CA, US
J. Parce - Palo Alto CA, US
Erik Scher - San Francisco CA, US -
Assignee:NANOSYS, Inc. - Palo Alto CA
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International Classification:B32B 5/16
B32B 15/04
B32B 17/06 -
US Classification:428402240
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Abstract:Ligand compositions for use in preparing discrete coated nanostructures are provided, as well as the coated nanostructures themselves and devices incorporating same. Methods for post-deposition shell formation on a nanostructure and for reversibly modifying nanostructures are also provided. The ligands and coated nanostructures of the present invention are particularly useful for close packed nanostructure compositions, which can have improved quantum confinement and/or reduced cross-talk between nanostructures.
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Electron Blocking Layers For Electronic Devices
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US Patent:20080150003, Jun 26, 2008
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Filed:Dec 20, 2006
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Appl. No.:11/641956
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Inventors:Jian Chen - Mountain View CA, US
Xiangfeng Duan - Mountain View CA, US
Karen Cruden - Pleasanton CA, US
Chao Liu - San Jose CA, US
Madhuri L. Nallabolu - Sunnyvale CA, US
Srikanth Ranganathan - Mountain View CA, US
Francisco Leon - Palo Alto CA, US
J. Wallace Parce - Palo Alto CA, US -
International Classification:H01L 29/792
H01L 21/336 -
US Classification:257324, 438287, 257E21409, 257E29309
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Abstract:Methods and apparatuses for electronic devices such as non-volatile memory devices are described. The memory devices include a multi-layer control dielectric, such as a double or triple layer. The multi-layer control dielectric includes a combination of high-k dielectric materials such as aluminum oxide (Al2O3), hafnium oxide (HfO2), and/or hybrid films of hafnium aluminum oxide. The multi-layer control dielectric provides enhanced characteristics, including increased charge retention, enhanced memory program/erase window, improved reliability and stability, with feasibility for single or multistate (e.g., two, three or four bit) operation.
Isbn (Books And Publications)
Name / Title
Company / Classification
Phones & Addresses
President
Six Dynasties, Inc
Nonclassifiable Establishments
Nonclassifiable Establishments
559 Pilgrim Dr, San Mateo, CA 94404
(650)6380886
(650)6380886
President
WANLU DEVELOPMENT CORPORATION
Metals Service Center
Metals Service Center
1400 Coleman Ave SUITE E15F, Santa Clara, CA 95050
271 N 1 St, San Jose, CA 95113
271 N 1 St, San Jose, CA 95113
President
CADONA INTERNATIONAL, INC
PO Box 81, Fremont, CA 94537
U.S. Daden Culture LLC
Book Publishing · Book Publishing Company · Beauty Shop
Book Publishing · Book Publishing Company · Beauty Shop
3440 Foothill Blvd, Oakland, CA 94601
3400 Eden Ln, Oakland, CA 94601
3400 Eden Ln, Oakland, CA 94601
President
CADONA, INC
Whol Gifts · Other Miscellaneous Nondurable Goods Merchant Wholesalers
Whol Gifts · Other Miscellaneous Nondurable Goods Merchant Wholesalers
33401 Central Ave, Union City, CA 94587
Union City, CA 94587
(510)4291828
Union City, CA 94587
(510)4291828
President
TONY & LINDA LIU'S FAMILY FOUNDATION
33401 Central Ave, Union City, CA 94587
Liuchao, LLC
559 Pilgrim Dr, San Mateo, CA 94404
136 Barbaree Way, Tiburon, CA 94920
136 Barbaree Way, Tiburon, CA 94920
Resumes
Chao Liu Sunnyvale, CA
view sourceWork:
Advenira Enterprises
Feb 2012 to 2000
Senior Scientist Nanosys Inc
Palo Alto, CA
Jul 2004 to Feb 2012
R&D Scientist Seagate Technology
Pittsburgh, PA
May 2001 to Jul 2004
Post Doctor Researcher & Research Staff Member Georgia Institute of Technology
Atlanta, GA
Jan 1997 to May 2001
Graduate Research Assistant Shanghai Institute of Optics and Fine Mechanics
Jul 1993 to Dec 1996
Chinese Academy of Sciences, Research Scientist
Feb 2012 to 2000
Senior Scientist Nanosys Inc
Palo Alto, CA
Jul 2004 to Feb 2012
R&D Scientist Seagate Technology
Pittsburgh, PA
May 2001 to Jul 2004
Post Doctor Researcher & Research Staff Member Georgia Institute of Technology
Atlanta, GA
Jan 1997 to May 2001
Graduate Research Assistant Shanghai Institute of Optics and Fine Mechanics
Jul 1993 to Dec 1996
Chinese Academy of Sciences, Research Scientist
Education:
Georgia Institute of Technology
1997 to 2001
Ph.D. in Chemistry University of Science and Technology of China
1988 to 1993
B.S. in Chemistry
1997 to 2001
Ph.D. in Chemistry University of Science and Technology of China
1988 to 1993
B.S. in Chemistry
Skills:
problem solving, failure analysis, TEM, SEM, nanotechnology, coating
Chao Liu Buffalo, NY
view sourceWork:
Cisco System Inc
Santa Clara, CA
May 2011 to Aug 2011
Intern SAP
Jan 2010 to May 2010
Intern PwC
Jun 2009 to Jan 2010
(PricewaterhouseCoopers) Intern Shanghai, China
Santa Clara, CA
May 2011 to Aug 2011
Intern SAP
Jan 2010 to May 2010
Intern PwC
Jun 2009 to Jan 2010
(PricewaterhouseCoopers) Intern Shanghai, China
Education:
Tongji University
Jun 2010
Bachelor of Science in Software Engineering State University of New State at Buffalo
Buffalo, NY
Master of Science in Computer Science and Engineering
Jun 2010
Bachelor of Science in Software Engineering State University of New State at Buffalo
Buffalo, NY
Master of Science in Computer Science and Engineering
Googleplus
Chao Liu
Chao Liu
Work:
Google
Education:
University of Chicago
Chao Liu
Chao Liu
Work:
Google - Software Engineer
Chao Liu
Chao Liu
Chao Liu
Tagline:
Life is short. Stay awake for it!
Chao Liu
Tagline:
Victory in Jesus
Myspace
Classmates
Chao Chuan Liu
view sourceSchools:
John S. Jones Elementary School Rainbow City AL 1994-1994, Rainbow Middle School Rainbow City AL 1995-1996
Community:
David Clontz
Liu Chao, Tampa Rural Hig...
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Rainbow Middle School, Ra...
view sourceGraduates:
Chao Chuan Liu (1995-1996),
Chad Horsley (1989-1991),
John Davidson (1977-1985)
Chad Horsley (1989-1991),
John Davidson (1977-1985)
John S. Jones Elementary ...
view sourceGraduates:
Donald Minyard (1964-1969),
Cassie Taylor (1992-1999),
Seth Ulrich (1994-2000),
Andrew Martin (1982-1986),
Chao Chuan Liu (1994-1994)
Cassie Taylor (1992-1999),
Seth Ulrich (1994-2000),
Andrew Martin (1982-1986),
Chao Chuan Liu (1994-1994)
Oklahoma City Univercity,...
view sourceGraduates:
Michael Sutton (1981-1985),
Firas Hamdan (1997-2001),
Chao Lin Liu (1987-1991)
Firas Hamdan (1997-2001),
Chao Lin Liu (1987-1991)
Youtube
Flickr
Chao Liu
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Chao Liu
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Chao Liu
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Chao Liu
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Chao Liu
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Chao Liu Brant
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Chao Liu
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Chao Liu
view sourceNews
System lets robots identify an object’s properties through handling
view source- His coauthors include fellow MIT postdoc Chao Liu; Pingchuan Ma PhD 25; Jack Eastman MEng 24; Dylan Randle and Yuri Ivanov of Amazon Robotics; MIT professors of electrical engineering and computer science Daniela Rus, who leads MITs Computer Science and Artificial Intelligence Laboratory (CSAIL);
- Date: May 08, 2025
- Category: Science
- Source: Google
Get Report for Chao Shih Liu from Danville, CA, age ~63