Corey S Jacobsen from Donnelly, ID, age 50

Method Of Making Semiconductor Bga Package Having A Segmented Voltage Plane
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US Patent:

7501313, Mar 10, 2009
Filed:

Jul 10, 2006
Appl. No.:

11/483452
Inventors:

Michael W. Morrison - Boise ID, US
Walter L. Moden - Meridian ID, US
Corey Jacobsen - Boise ID, US
Assignee:

Micron Technology, Inc. - Boise ID
International Classification:

H01L 21/00
US Classification:

438118, 438122, 438123, 438124, 257698, 257738, 257780
Abstract:

A semiconductor device assembly and method of making the device are disclosed. The assembly comprises a semiconductor die attached to an electrically conductive layer, which is, in turn, connected to a dielectric layer carrying conductive traces of the electrical connection layer. The conductive traces provide connection between an array of discrete conductive elements and bonding wires connected to bond pads of the die. The conductive layer enhances thermal conduction and structural stiffness for the assembly. In addition, the conductive layer provides a voltage reference plane that may be connected to a power source, a ground source, or an intermediate reference voltage. The conductive layer also includes at least one electrical current isolation slot, which segments the conductive layer to help isolate noise induced in one segment of the conductive layer from the other segments.

Semiconductor Bga Package Having A Segmented Voltage Plane
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US Patent:

7663224, Feb 16, 2010
Filed:

Jul 10, 2006
Appl. No.:

11/483905
Inventors:

Michael W. Morrison - Boise ID, US
Walter L. Moden - Meridian ID, US
Corey Jacobsen - Boise ID, US
Assignee:

Micron Technology, Inc. - Boise ID
International Classification:

H01L 23/04
US Classification:

257698, 257738, 257780
Abstract:

A semiconductor device assembly and method of making the device are disclosed. The assembly comprises a semiconductor die attached to an electrically conductive layer, which is, in turn, connected to a dielectric layer carrying conductive traces of an electrical connection layer. The conductive traces provide connection between an array of discrete conductive elements and bonding wires connected to bond pads of the die. The conductive layer enhances thermal conduction and structural stiffness for the assembly. In addition, the conductive layer provides a voltage reference plane that may be connected to a power source, a ground source, or an intermediate reference voltage. The conductive layer also includes at least one electrical current isolation slot, which segments the conductive layer to help isolate noise induced in one segment of the conductive layer from the other segments.

Semiconductor Bga Package Having A Segmented Voltage Plane And Method Of Making
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US Patent:

20050218486, Oct 6, 2005
Filed:

Mar 10, 2004
Appl. No.:

10/797647
Inventors:

Michael Morrison - Boise ID, US
Walter Moden - Meridian ID, US
Corey Jacobsen - Boise ID, US
International Classification:

H01L023/495
US Classification:

257676000
Abstract:

A semiconductor device assembly and method of making the devices are disclosed. The assembly comprises a semiconductor die attached to an electrically conductive layer, which is in turn, connected to a dielectric layer carrying conductive traces of the electrical connection layer. The conductive traces provide connection between an array of discrete conductive elements and bonding wires connected to bond pads of the die. The conductive layer enhances thermal conduction and structural stiffness for the assembly. In addition, the conductive layer provides a voltage reference plane that may be connected to a power source, a ground source, or an intermediate reference voltage. The conductive layer also includes at least one electrical current isolation slot, which segments the conductive layer to help isolate noise induced in one segment of the conductive layer from the other segments.