Daniel J Ferris

US Patent:

7019562, Mar 28, 2006

Filed:

Dec 16, 2003

Appl. No.:

10/737284

Inventors:

Daniel J. Ferris - Lakeville MN, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H03K 5/22

US Classification:

327 65, 327436, 327543

Abstract:

According to one embodiment, a locally regulated circuit regulates current flows (Iand I) through the operation of a current mirror (). The regulated current flows are used to self-generate a common mode voltage (V) at node () and to produce the required bias signals through input stage ( and ) and output stage ( and ) in response to data input signals (D and D-complement). Cancellation of common mode voltage variation is further enhanced by generating a supplemental current in response to an error signal generated by comparing a desired common mode voltage (V) to the actual common mode voltage at node (). The supplemental current conducted by either of loads ( and ) serves to regulate the common mode voltage at node ().

US Patent:

7161406, Jan 9, 2007

Filed:

Apr 15, 2004

Appl. No.:

10/824960

Inventors:

Daniel J. Ferris - Lakeville MN, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

G06F 7/44

US Classification:

327359

Abstract:

A method and apparatus for providing non 2:1 current in a Gilbert cell mixer is disclosed. The Gilbert cell mixer provides lower voltage operation, lower LO drive and better linearity. Additional current sources are provided to drive the lower, source-coupled transistor pair thereby allowing operation of the switch transistors with lower current.