Darryn D Mcdade

US Patent:

6414996, Jul 2, 2002

Filed:

Dec 8, 1998

Appl. No.:

09/207343

Inventors:

Jefferson Eugene Owen - Fremont CA
Darryn McDade - Santa Clara CA

Assignee:

STMicroelectronics, Inc. - Carrollton TX

International Classification:

H04N 712

US Classification:

37524017, 37524016, 37524025, 348699

Abstract:

The present invention provides a system, method and an apparatus for a digital video processor comprising an error memory and a merge memory, a half pixel filter communicably coupled to the merge memory, a controller communicably coupled to the error memory, the merge memory and the half pixel filter. The present invention also including a sum unit communicably coupled to the error memory. The controller executing one or more instructions to provide motion compensation during video decoding.

US Patent:

6490324, Dec 3, 2002

Filed:

Dec 8, 1998

Appl. No.:

09/207346

Inventors:

Darryn McDade - Santa Clara CA
Jefferson Eugene Owen - Fremont CA

Assignee:

STMicroelectronics, Inc. - Carrollton TX

International Classification:

H04N 718

US Classification:

37524025, 37524018

Abstract:

The present invention provides a system, method and an apparatus for a digital video decoder, which includes a data processor that utilizes at least an encoded video data stream to produce one or more output streams. The one or more output streams includes at least a set of motion compensation instructions.

US Patent:

6947485, Sep 20, 2005

Filed:

Nov 20, 2001

Appl. No.:

09/990027

Inventors:

Jefferson Eugene Owen - Fremont CA, US
Darryn McDade - Santa Clara CA, US

Assignee:

STMicroelectronics, Inc. - Carrollton TX

International Classification:

H04N007/12

US Classification:

37524016, 37524025, 348699

Abstract:

The present invention provides a system, method and an apparatus for a digital video processor comprising an error memory and a merge memory, a half pixel filter communicably coupled to the merge memory, a controller communicably coupled to the error memory, the merge memory and the half pixel filter. The present invention also including a sum unit communicably coupled to the error memory. The controller executing one or more instructions to provide motion compensation during video decoding.

US Patent:

7844167, Nov 30, 2010

Filed:

Dec 8, 1998

Appl. No.:

09/207136

Inventors:

Darryn McDade - Santa Clara CA, US
Jefferson Eugene Owen - Fremont CA, US

Assignee:

STMicroelectronics, Inc. - Carrollton TX

International Classification:

H04N 5/91

US Classification:

386 95, 386126

Abstract:

The present invention provides a system and an apparatus for a digital audio/video decoder comprising a file reader capable of obtaining an encoded audio/video data stream from a data source, a navigator that instructs the file reader to obtain the encoded audio/video data stream, a splitter that separates the encoded audio/video data stream obtained by the file reader into one or more component data streams, and a reprogrammable proxy filter that decodes and converts the one or more component data streams into three or more renderable signals including at least one renderable audio signal and at least two renderable video signals.

US Patent:

20020114395, Aug 22, 2002

Filed:

Dec 8, 1998

Appl. No.:

09/207554

Inventors:

JEFFERSON EUGENE OWEN - FREMONT CA, US
DARRYN MCDADE - SANTA CLARA CA, US

International Classification:

H04N007/12

US Classification:

375/240180, 375/240170

Abstract:

The present invention provides a method and an apparatus for an instruction generator that utilizes two or more parameters comprising one or more prediction mode parameters and one or more motion vector parameters to generate one or more motion compensation instructions for a prediction block in a macroblock.

US Patent:

20080040601, Feb 14, 2008

Filed:

Aug 3, 2007

Appl. No.:

11/890287

Inventors:

Darryn McDade - Livermore CA, US

Assignee:

STMicroelectronics, Inc. - Carrollton TX

International Classification:

G06F 1/24
G06F 11/22

US Classification:

713100000, 714036000, 714E11150

Abstract:

The present disclosure provides a system for providing a security and method of providing an enhanced security booting environment. The system and method includes a basic input/output system (BIOS) stored in memory. The system and method also includes a counter embedded in the memory configured to monitor the number of times each block of the memory has been written. This information could be used with existing error detection mechanisms to improve the ability to detect unintended write operations.

US Patent:

20090016438, Jan 15, 2009

Filed:

May 5, 2008

Appl. No.:

12/151210

Inventors:

Darryn McDade - Santa Clara CA, US
Jefferson Eugene Owen - Fremont CA, US

International Classification:

H04N 7/26

US Classification:

37524016, 375E07123

Abstract:

The present invention provides a method and an apparatus for an instruction generator that utilizes two or more parameters comprising one or more prediction mode parameters and one or more motion vector parameters to generate one or more motion compensation instructions for a prediction block in a macroblock.

US Patent:

20110197264, Aug 11, 2011

Filed:

Feb 8, 2011

Appl. No.:

13/023409

Inventors:

Darryn D. McDade - Livermore CA, US

Assignee:

STMicroelectronics, Inc. - Coppell TX

International Classification:

G06F 21/00
G06F 15/16

US Classification:

726 4, 709219

Abstract:

Embodiments of the present disclosure provide a system and method for remotely accessing media content. The method includes receiving authentication information originating from a communication device associated with a user. Media content that is stored on a media storage device associated with the user is also received. Digital rights management software is applied to the media content, and the received media content is communicated to the communication device.