Domenic J Forte

US Patent:

20210081574, Mar 18, 2021

Filed:

Sep 1, 2020

Appl. No.:

17/008722

Inventors:

- Gainesville FL, US
Fatemeh Ganji - Gainesville FL, US
Nima Maghari - Gainesville FL, US
Domenic J. Forte - Gainesville FL, US

International Classification:

G06F 21/73
G06F 21/44
G06N 20/00

Abstract:

Embodiments of the present disclosure provide methods, systems, apparatus, and computer program products are for detecting whether a suspect component such as an integrated circuit (IC) or a system-on-chip (SoC) is recycled. Specifically, various embodiments involve processing power supply rejection ratio (PSRR) data obtained from a low drop-out regulator (LDO) used for the suspect component using a recycle detection machine learning model to generate a recycle prediction. In particular embodiments, the recycle detection machine learning model is developed based at least in part on degradation of PSRRs of LDOs. Accordingly, a determination is made as to whether the suspect component is recycled based on the recycle prediction. If so, then an indication that the suspect component is recycled is provided.

US Patent:

20210034805, Feb 4, 2021

Filed:

Jul 13, 2020

Appl. No.:

16/927195

Inventors:

- Gainesville FL, US
Domenic J. Forte - Gainesville FL, US
Ronald Wilson - Gainesville FL, US

International Classification:

G06F 30/392
G06T 7/00

Abstract:

Methods and apparatus are provided for automatically extracting standard cells to form a standard cell library using raw multi-layer images of an IC. Accordingly, various embodiments involve: extracting the raw contact layer image from the raw multi-layer images; binarizing the raw contact layer image to generate a binarized contact layer image identifying a plurality of contact rows and a plurality of contact columns; determining a plurality of Vlines based on a subset of the plurality of contact rows having a periodic nature; extracting a plurality of binarized contact layer image strips from the binarized contact layer image; encoding each binarized contact layer image strip using feature vectors and column distance values; applying a model rule set to each encoded binarized contact layer image strip for detecting cell boundaries; extracting the standard cells based on the cell boundaries; and storing the extracted cells to form a standard cell candidate library.

US Patent:

20210026994, Jan 28, 2021

Filed:

Jul 23, 2019

Appl. No.:

16/520002

Inventors:

- Gainesville FL, US
Adib Nahiyan - Gainesville FL, US
Domenic J. Forte - Gainesville FL, US
Jungmin Park - Gainesville FL, US

International Classification:

G06F 21/75
G06F 17/50

Abstract:

Various examples are provided related to power side-channel vulnerability assessment. In one example, a method includes identifying target registers in an IC design; generating input patterns associated with a target function that can generate a power difference in the target registers when processing the target function; determining a side-channel vulnerability (SCV) metric using the power difference produced by the input patterns; and identifying a vulnerability in the IC design using the SCV metric. Identification of the vulnerability allows for modification of the IC design at an early stage, which can avoid power side-channel attacks (e.g., DPA and CPA) in the fabricated IC design. The method can be used for pre-silicon power side-channel leakage assessment of IC designs such as, e.g., cryptographic and non-cryptographic circuits.

US Patent:

20210019865, Jan 21, 2021

Filed:

Jul 8, 2020

Appl. No.:

16/923255

Inventors:

- Gainesville FL, US
Domenic J. Forte - Gainesville FL, US
Ronald Wilson - Gainesville FL, US

International Classification:

G06T 5/00
H04N 19/93

Abstract:

Systems and methods are configured to generate a frequency map representing a density of objects found in regions of a sample that may be used in setting parameters for imaging the regions. Various embodiments involve binarizing the pixels for a raw image of the sample to transform the image into binary data. Run-length encoded components are identified from the data for dimensions of the raw image. Each component is a length of a sequence of adjacent pixels found in a dimension with the same value in the binary data. A projection of the image is then generated from projection values for the dimensions. Each projection value provides a measure of the density of objects present in a dimension with respect to the components identified for the dimension. This projection is used to identify a level of density for each region of the sample from which the frequency map is generated.

US Patent:

20200251602, Aug 6, 2020

Filed:

Jan 28, 2020

Appl. No.:

16/775178

Inventors:

- Gainesville FL, US
Domenic J. Forte - Gainesville FL, US
Mark M. Tehranipoor - Gainesville FL, US

International Classification:

H01L 31/0236
H01L 23/00
H01L 23/532
H01L 21/768
G01R 31/311

Abstract:

A pyramid structure to mitigate optical probing attacks in ICs by scrambling the measurements reflected by a laser pulse is disclosed. The pyramid structure is applied to selected areas at the bottom surface of the metal traces in metal layer to circumvent the extra silicon layer and thus minimize the changes to the conventional device structures. The pyramid structure includes randomized pyramids at nanometer scale. Optical simulation results show the pyramidized metal surface is able to prevent optical probing attacks. The fabrication of pyramids is CMOS compatible as well. Optical simulations are performed to analyze the impact these nano-scaled pyramids in a laser voltage probing attacking model. The nanopyramid can disturb the optical measurements enough to make the attacks practically infeasible. In addition, the nanopyramid structure countermeasure works in a passive mode without consuming any energy.

US Patent:

20200065456, Feb 27, 2020

Filed:

Aug 8, 2019

Appl. No.:

16/535795

Inventors:

- Gainesville FL, US
Domenic J. Forte - Gainesville FL, US
Farimah Farahmandi - Gainesville FL, US
Adib Nahiyan - Gainesville FL, US
Fahim Rahman - Gainesville FL, US
Mohammad Sazadur Rahman - Gainesville FL, US

International Classification:

G06F 21/14
H03K 19/177
G06F 21/72
G06F 12/14

Abstract:

A dynamically obfuscated scan chain (DOSC) includes a control module designed to control memory loading, a linear feedback shift register (LFSR), a dynamic Obfuscation Key generator configured to use LFSR to generate a φ-bit protected Obfuscation Key, in order to confuse and change the test data into an output scan vectors when the Obfuscation Key update is triggered. The DOSC also includes a shadow chain, configured to input the φ-bit protected Obfuscation Key generated by the LFSR, and output k └φ×α┘-bit protected Obfuscation Keys, and obfuscated scan chains. The DOSC operating method includes: loading control vectors to LFSR from control module during initialization; generating the Obfuscation Key at an output of the LFSR; generating the Obfuscation Key bit by bit based at least in part on the shadow chain and the Obfuscation Key during a first scan clock after reset in order to confuse test patterns.

US Patent:

20190385038, Dec 19, 2019

Filed:

Jun 7, 2019

Appl. No.:

16/434402

Inventors:

- Gainesville FL, US
Kun Yang - Gainesville FL, US
Domenic J. Forte - Gainesville FL, US
Ulbert Botero - Gainesville FL, US
Haoting Shen - Tallahassee FL, US

International Classification:

G06K 19/077
G06K 7/10
H01Q 1/22
H01Q 1/38
H01Q 13/10

Abstract:

An unclonable chipless radio frequency identification (RFID) tag and corresponding cross-registration methods of determining an identity and/or tag signature of an RFID tag are described. In an example embodiment, an unclonable chipless RFID tag comprises a first tag portion comprising one or more first conductive members unremovably secured to a dielectric item; and a second tag portion comprising packaging conductive pattern. The first tag portion and the second tag portion are in a static or fixed physical relationship with respect to one another.

US Patent:

20190347417, Nov 14, 2019

Filed:

May 14, 2018

Appl. No.:

15/978734

Inventors:

- Gainesville FL, US
Adib Nahiyan - Gainesville FL, US
Domenic J. Forte - Gainesville FL, US

International Classification:

G06F 21/56
G06F 21/76
G06F 21/57

Abstract:

Disclosed are various embodiments for detecting hardware Trojans through information flow security verification. A file comprising register transfer level (HDL) code for an intellectual property core is loaded from memory. An asset within the intellectual property core is identified. An integrity verification or confidentiality verification of the HDL code that represents the asset is performed. An integrity violation or confidentiality violation within the HDL code as a result of performance of the integrity verification or confidentiality violation on the HDL code that represents the asset is detected. A malicious control point or a malicious observation point linked to the asset is identified. Finally, a trigger circuit for a hardware Trojan is identified in response to identification of the malicious control point or malicious observation point.