Weishi Feng - San Jose CA, US Liang Zhang - Union City CA, US Zhan Yu - Sunnyvale CA, US
Assignee:
Marvell International Ltd. - Hamilton
International Classification:
H03M013/29 H03M013/23
US Classification:
714758, 714763, 714765, 714769, 714781
Abstract:
Method and apparatus for detecting errors in data read from a data storage medium include an error correction step/device which receives at least one of (i) data and (ii) data with errors, from the data storage medium, and outputs an error sequence in a first order in the case where data with errors is received. A first CRC step/device receives the at least one of (i) data and (ii) data with errors from the data storage medium, and outputs a CRC checksum in a second order different from said first order. A second CRC step/device receives both the error sequence and the CRC checksum, and outputs another CRC checksum indicative of whether the correction device or step has generated a correct error sequence. Preferably, a first CRC is coupled parallel to a Reed-Soloman decoder, and a second CRC is coupled in series with the first CRC and so as to receive the output of the R-S decoder. The second CRC will thus be able to detect errors in the output of the R-S decoder, and provide an error signal which will cause the erroneous data to be reread.
Evaluating A Validation Vector For Validating A Network Design
Indradeep Ghosh - San Jose CA, US Koichiro Takayama - Cupertino CA, US Liang Zhang - Blacksburg VA, US
Assignee:
Fujitsu Limited - Kawasaki
International Classification:
G06F017/50
US Classification:
716 4, 716 5, 716 18
Abstract:
Evaluating a validation vector includes receiving a network having nodes and a target set that includes one or more nodes of the network. The following steps are repeated until the nodes of the target set have been selected. A node is selected from the target set, and a tag is assigned to the node, where the tag represents an error of a value of a variable corresponding to the node. A test environment specifying a propagation path from an input, through the node, and to an output is generated. The test environment is translated into a validation vector, and the tag is propagated to the output according to the validation vector. After repeating the steps, coverage for the validation vectors is determined in accordance with the propagation to evaluate the one or more validation vectors.
Generating A Test Environment For Validating A Network Design
Indradeep Ghosh - San Jose CA, US Liang Zhang - Blacksburg VA, US
Assignee:
Fujitsu Limited - Kawasaki
International Classification:
G06F 11/00
US Classification:
714 4
Abstract:
Generating a test environment includes accessing initial test environments for a network of nodes, where a test environment specifies a propagation or justification path for a node. The following are repeated until satisfactory coverage is achieved or until a predetermined number of iterations is reached. A coverage for each test environment is calculated, and at least two of the test environments are mated to generate next test environments, where the coverage of the at least two test environments is greater than the coverage of the other test environments.
Indradeep Ghosh - San Jose CA, US Koichiro Takayama - Cupertino CA, US Liang Zhang - Blacksburg VA, US
Assignee:
Fujitsu Limited - Kawasaki
International Classification:
G01R 31/28
US Classification:
714712, 716 4
Abstract:
Propagating an error through a network includes receiving a network having propagation paths and nodes, where a propagation path has one or more nodes and a node is associated with a variable operable to have a value during simulation. A tag of a tag set is assigned to the value. The tag set includes at least two signed tags, positive tag representing a positive error and a negative tag representing a negative error, and an unsigned tag representing an error having an unknown sign. The tag is propagated along the propagation path to yield intermediate tags, where at least one intermediate tag is an unsigned tag formed from at least two signed tags. A final tag is determined in accordance with the intermediate tags in order to propagate an error through the network.
Method And Apparatus For Checking Read Errors With Two Cyclic Redundancy Check Stages
Weishi Feng - San Jose CA, US Liang Zhang - Union City CA, US Zhan Yu - Sunnyvale CA, US
Assignee:
Marvell International Ltd. - Hamilton
International Classification:
H03M 13/23 H03M 13/29
US Classification:
714763, 714758, 714765, 714781
Abstract:
A system for detecting errors in received input data includes a first error detection circuit. The first error detection circuit is configured to receive the input data. The input data includes at least one of data and data with errors. The first error detection circuit is configured to generate a first error detection sequence in a first order. The system includes a second error detection circuit. The second error detection circuit is configured to receive the first error detection sequence and an error sequence. The error sequence is received in a second order that is different from the first order when there is data with errors. The second error detection circuit is configured to generate a second error detection sequence that indicates whether the error sequence is generated correctly.
Clustering Cookies For Identifying Unique Mobile Devices
Anirban Dasgupta - Berkeley CA, US Liang Zhang - Fremont CA, US Maxim Gurevich - Cupertino CA, US Achint Oommen Thomas - Buffalo NY, US Belle Tseng - Cupertino CA, US
Assignee:
Yahoo! Inc. - Sunnyvale CA
International Classification:
G06N 5/02
US Classification:
706 50
Abstract:
Embodiments are directed towards clustering cookies for identifying unique mobile devices for associating activities over a network with a given mobile device. The cookies are clustered based on a Bayes Factor similarity model that is trained from cookie features of known mobile devices. The clusters may be used to determine the number of unique mobile devices that access a website. The clusters may also be used to provide targeted content to each unique mobile device.
Method And Apparatus For A Low Power Ac On-Die-Termination (Odt) Circuit
Liang L. Zhang - Duluth GA, US Suresh Atluri - Duluth GA, US
Assignee:
Integrated Device Technology, Inc. - San Jose CA
International Classification:
H04J 3/10
US Classification:
370201
Abstract:
A communication system is disclosed. The communication system comprises a printed circuit board. The printed circuit board includes a plurality of channels; The communication system includes a plurality of receivers coupled to outputs of the plurality of channels; and a plurality of drivers coupled to inputs of the plurality of channels, wherein a slew rate for each of the plurality drivers is dependent on the transitions of its neighboring drivers. The communication system further includes a plurality of slew rate equalizers coupled to the plurality of drivers, wherein a slew rate driver coupled to a victim channel compensates for cross talk from its neighboring aggressor channels by adjusting its slew rate based upon a signal received from the slew rate equalizer of the victim channel.
SpaceX Hawthorne, CA Jan 2013 to Jul 2013 Avionics/Hardware Design InternAir Force Research Laboratories Rome, NY Apr 2012 to Aug 2012 Engineering/Research Analyst InterndB Control Fremont, CA Apr 2009 to Apr 2010 Electronics Technician
Education:
University of California Irvine, CA 2009 B.S. in Electrical EngineeringEmbry-Riddle Aeronautical University Daytona Beach, FL M.S. in Electrical and Computer Engineering