Michael Joseph Browne

US Patent:

7359820, Apr 15, 2008

Filed:

Jan 3, 2007

Appl. No.:

11/619412

Inventors:

Michael E. Browne - Staatsburg NY, US
Andrew P. Wack - Millbrook NY, US
Monica J. Lemay - Austin TX, US
Derwin D. Gavin - Round Rock TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 19/00

US Classification:

702108, 702 68, 702 80, 702 81, 702118, 702119, 702120, 702121, 702122, 702123, 702183, 702184, 702188, 707 10, 714724, 714726, 714733, 717102, 717106, 717107, 717108

Abstract:

Disclosed are a method, information processing system and computer readable medium for performing a system test on a program. The method comprises creating a test plan associated with a system test. The system test is for testing a program within an environment. At least one test trigger to be monitored for during the system test is defined within the test plan. Execution of the system test on a system under test for the at least one test trigger is monitored. An occurrence of the at least one test trigger is determined. The test plan is modified to take into account the occurrence of the at least one test trigger in response to determining the occurrence. Execution of the system test is continued based on the modified test plan.

US Patent:

7661045, Feb 9, 2010

Filed:

Dec 19, 2007

Appl. No.:

11/960179

Inventors:

Michael E. Browne - Staatsburg NY, US
Trevor E. Carlson - Bethpage NY, US
Stephanie A. Schaum - Poughkeepsie NY, US
Ashwin S. Venkatraman - Poughkeepsie NY, US
Maria R. Ward - Pflugerville TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G11C 29/00
G06F 11/00

US Classification:

714723, 714 47, 714764

Abstract:

A method and system for enterprise memory management of memory modules of a computer system. The method includes scanning memory chips of a memory module for errors, analyzing a scrub error map corresponding to a scrubbing operation of the memory module, generating a scrub map summary based upon the scrub error map analyzed, creating an error history map by adding the scrub map summary generated, analyzing the error history map created and tracking a chip location for each memory chip of the memory module including errors, and determining a scrubbing algorithm of the memory module based on the analyzed error history map. The enterprise memory management system includes a plurality of computers each including memory modules, and an enterprise memory manager which collects and analyzes error history maps corresponding to each computer and determines a scrubbing algorithm of the memory modules of each computer.

US Patent:

7818309, Oct 19, 2010

Filed:

Sep 12, 2007

Appl. No.:

11/854002

Inventors:

Michael E. Browne - Staatsburg NY, US
Glenn R. Wightwick - Tucson AZ, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 17/30
G06F 7/00

US Classification:

707705, 707783

Abstract:

A method and system are provided for managing requests to access data in a computer environment. In one aspect of the present invention, a request manager receives a request associated with meta data corresponding to data that is maintained separately from the meta data. In another aspect, the request manager informs a data object manager of an anticipated request that will be received by the data object manager to enable it to prepare for the anticipated request. The data object manager commences preparing for the anticipated request in response to being informed of the anticipated request to facilitate a reduction in data access time. In one example of a computing environment utilizing one or more aspects of the invention, a storage subsystem comprising a data object manager prepares for the anticipated request by pre-fetching data blocks from storage media into a cache.

US Patent:

7873883, Jan 18, 2011

Filed:

Dec 19, 2007

Appl. No.:

11/959727

Inventors:

Michael E. Browne - Staatsburg NY, US
Trevor E. Carlson - Bethpage NY, US
Stephanie A. Schaum - Poughkeepsie NY, US
Ashwin S. Venkatraman - Poughkeepsie NY, US
Maria R. Ward - Pflugerville TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G11C 29/10
G11C 29/54

US Classification:

714718, 714 42

Abstract:

A method for scrubbing storage in a computer memory which includes a plurality of memory modules each having plurality of memory chips. The method includes selecting a pattern that correlates with physical structures for scanning the memory chips of the memory modules for errors, scanning a memory chip of a memory module for errors based upon the selected pattern. The method further includes successively scanning remaining memory chips of the respective memory module for errors when an error is found in the scanned memory chip, and scanning a memory chip of another memory module when an error is not found in the scanned memory chip of the respective memory module.

US Patent:

8190545, May 29, 2012

Filed:

Jan 14, 2009

Appl. No.:

12/353378

Inventors:

Michael E. Browne - Staatsburg NY, US
Carole A. Jannak - Austin TX, US
Sandra K. Johnson - Cary NC, US
Colin James Parris - Brookfield CT, US
Katherine June Pearsall - Georgetown TX, US
Bernadette Marie Wing - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 17/00

US Classification:

706 45

Abstract:

A system thinker application receives a first issue, a first resolution to the first issue, and a first plurality of skills. The system thinker application searches a system environment electronic profile for a second issue, a second resolution to the second issue, and a second plurality of skills, wherein the system environment electronic profile contains a plurality of component profiles, and wherein the plurality of component profiles contain a second issue, a second resolution to the second issue, and a second plurality of skills. The system thinker application determines if the first issue, the first resolution to the first issue, and any one of the first plurality of skills are similar to any one of the second issue, the second resolution to the second issue, and any one of the second plurality of skills. The system thinker application adds skills to the system environment electronic profile and the component profile.

US Patent:

8220032, Jul 10, 2012

Filed:

Jan 29, 2008

Appl. No.:

12/021559

Inventors:

Robert J. Brenneman - Stormville NY, US
Michael E. Browne - Staatsburg NY, US
William J. Huie - Poughkeepsie NY, US
Sarah J. Sheppard - Poughkeepsie NY, US
Kyle M. Smith - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L 29/06

US Classification:

726 3, 726 2, 726 4, 726 5, 726 9, 726 26, 726 27, 726 29, 705 64, 705 65, 709223, 709225

Abstract:

Using an authentication server to discover one or more additional authentication servers and to dynamically establish a trust relationship with the one or more additional authentication servers. The authentication server searches for the one or more additional authentication servers to discover one or more sources of authentication tokens, and inspects an incoming authentication request from the one or more additional authentication servers to determine if the request is carrying one or more authentication tokens from a newly discovered realm. Once the authentication server determines a newly discovered realm to be trustworthy, the authentication server receives a directory schema from the newly discovered realm and compares the received directory schema with a known directory schema retrieved by the authentication server to identify an intersection of the received directory schema and the known directory schema. The authentication server uses the intersection to identify a primary key, and to identify any unique information that is specific to either the authentication server or the newly discovered realm.

US Patent:

8468315, Jun 18, 2013

Filed:

Oct 28, 2009

Appl. No.:

12/607118

Inventors:

Michael E. Browne - Staatsburg NY, US
Nancy J. Finn - Stormville NY, US
Christina Lara - Tucson AZ, US
Maria R. Ward - Pflugerville TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 12/00

US Classification:

711162, 711161, 707610, 707640, 707661, 707665, 707667, 714 411, 714 63, 709247

Abstract:

Computer program product, system and method are provided for facilitating data replication in a storage system. A logical volume of a first storage array of a replicated pair is preconfigured with one or more logical volume attributes, which include a compressible configuration bit that indicates whether data blocks to be stored to that logical volume are compressible during replication. Subsequently, with receipt of a data block at the first storage array to be stored to the logical volume, a check of the compressible configuration bit is made to determine whether the data block is compressible during replication, and if so, the data block is compressed for replication. The compressible configuration bit is placed into the payload region of the data packet being replicated to the second storage array. At the second storage array, the compressible configuration bit is used to determine whether to uncompress the replicated data block.

US Patent:

8473699, Jun 25, 2013

Filed:

Apr 16, 2012

Appl. No.:

13/447436

Inventors:

Michael E. Browne - Staatsburg NY, US
Nancy J. Finn - Stormville NY, US
Christina Lara - Tucson AZ, US
Maria R. Ward - Pflugerville TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 12/00

US Classification:

711162, 711161, 707610, 707640, 707661, 707665, 707667, 709247, 714 411, 714 63

Abstract:

A method is provided for facilitating data replication in a storage system. A logical volume of a first storage array of a replicated pair is preconfigured with one or more logical volume attributes, which include a compressible configuration bit that indicates whether data blocks to be stored to that logical volume are compressible during replication. Subsequently, with receipt of a data block at the first storage array to be stored to the logical volume, a check of the compressible configuration bit is made to determine whether the data block is compressible during replication, and if so, the data block is compressed for replication. The compressible configuration bit is placed into the payload region of the data packet being replicated to the second storage array. At the second storage array, the compressible configuration bit is used to determine whether to uncompress the replicated data block.