Michael Andrew Fischer

Address:

101 Ivy Ln, San Antonio, TX 78209

Phone:

(210)8282003

VIN:

1GNFK13067R144851

Make:

CHEVROLET

Model:

TAHOE

Year:

2007

US Patent:

6664833, Dec 16, 2003

Filed:

Nov 20, 2000

Appl. No.:

09/717459

Inventors:

Michael A. Fischer - San Antonio TX

Assignee:

Intersil Americas, Inc. - Irvine CA

International Classification:

H03K 512

US Classification:

327170, 327172

Abstract:

A function clock signal used to clock the execution of instructions in a serial peripheral interface based on a source clock signal is generated to have characteristics of one cycle per bit signal transmitted or received by the interface. The function clock signal is created by logically gating the source clock signal and a delayed copy of the source clock signal to create the function clock signal. The delayed copy of the source clock signal responds to edges of the function clock signal created by the logical gating, to create the function clock signal. In addition, the frequency of the function clock signal may be forced equal to the frequency of the source clock signal, which is useful to execute a single instruction for a repeated number of times. A rising edge of the function clock signal may also be made coincident to a rising edge of the source clock signal under such equal frequency circumstances.

US Patent:

6807640, Oct 19, 2004

Filed:

May 8, 2001

Appl. No.:

09/850803

Inventors:

Michael Andrew Fischer - San Antonio TX

Assignee:

Intersil Americas, Inc. - Milpitas CA

International Classification:

G06F 506

US Classification:

713600, 713400, 713401, 713 1, 713 2, 713100, 709200, 709202, 709228, 709233, 709245, 712 11, 712 16, 712220, 455 73, 455130, 455448

Abstract:

A programmable interface controller for transmitting data to an output device that is suitable in both fully synchronous systems and in systems that span clock domains. The illustrative embodiments comprise: receiving a plurality of field identifiers and an indication of an order by which each of the plurality of field identifiers is to be uniquely associated with each field in a sequence of fields; receiving a stream of data that comprises the sequence of fields and an indication of the boundary between successive fields in the sequence of fields; and processing each field in the stream of data in accordance with the field identifier uniquely associated with that field.

US Patent:

6871292, Mar 22, 2005

Filed:

Nov 20, 2000

Appl. No.:

09/717495

Inventors:

Michael A. Fischer - San Antonio TX, US

Assignee:

Intersil Americas, Inc. - Milpitas CA

International Classification:

G06F001/04
G06F001/08

US Classification:

713500, 713501

Abstract:

A sequencer executes instructions based on a function clock signal to perform I/O functions in a serial peripheral interface based on a source clock signal. The function clock signal has a frequency of two times the frequency of the source clock signal. A function clock generator generates the function clock signal and operatively selects the instruction to be decoded. The instruction selectively forces the frequency of the function clock signal to be equal to the frequency of the source clock signal during the duration of that function clock signal during which the predetermined instruction is decoded to execute a single instruction during the source clock signal, to advantageously repeat the execution of the instruction without consuming clock cycles.

US Patent:

6986141, Jan 10, 2006

Filed:

Dec 17, 1998

Appl. No.:

09/213970

Inventors:

Wilhelmus J. M. Diepstraten - Haghorst, NL
Michael A. Fischer - San Antonio TX, US
Wesley D. Hardell - San Antonio TX, US

Assignee:

Agere Systems Inc. - Allentown PA

International Classification:

G06F 4/46
G06F 15/00

US Classification:

718108, 712228

Abstract:

A context controller for managing multitasking in a processor and a method of operating the same. In one embodiment, the context controller includes: (1) a time slice instruction counter that counts a number of instructions executed with respect to a given background task and (2) a background task controller that cyclicly executes a context corresponding to another background task when the number of instructions executed equals a dynamically-programmable time slice value.

US Patent:

7313121, Dec 25, 2007

Filed:

Mar 15, 2004

Appl. No.:

10/801042

Inventors:

Michael Andrew Fischer - San Antonio TX, US
Maarten Menzo Wentink - Utrecht, NL

Assignee:

Conexant, Inc. - Red Bank NJ

International Classification:

H04Q 7/24

US Classification:

370338, 370349, 370329, 370341, 370328, 455450, 455509

Abstract:

A technique is disclosed that improves the efficiency of transmitting data over multiple shared-communications channels without some of the costs and disadvantages associated with techniques in the prior art. In particular, and in accordance with the illustrative embodiment of the present invention, a data frame is simultaneously transmitted across a plurality of channels, but the acknowledgment frame to the data frame is not. Instead, a plurality of redundant acknowledgment frames are generated and each one is transmitted independently and within each of the channels used to transmit the data frame.

US Patent:

7400621, Jul 15, 2008

Filed:

Jul 10, 2003

Appl. No.:

10/617324

Inventors:

Timothy Gordon Godfrey - Overland Park KS, US
Michael Andrew Fischer - San Antonio TX, US

Assignee:

Conexant, Inc. - Red Bank NJ

International Classification:

H04L 12/28

US Classification:

370389, 370392, 370475, 370328, 370338, 4554262

Abstract:

A technique for enabling a secure, point-to-point wireless connection between a secondary computer (e. g. , a personal digital assistant, etc. ) and a primary computer (e. g. , a notebook, a desktop, etc. ) is disclosed. The primary computer is associated with an extended infrastructure through an access point. The present invention enables the secondary computer to communicate either with the associated primary computer or with an extended network indirectly through the access point.

US Patent:

7400640, Jul 15, 2008

Filed:

Nov 4, 2003

Appl. No.:

10/701126

Inventors:

Michael Andrew Fischer - San Antonio TX, US
Timothy Gordon Godfrey - Overland Park KS, US

Assignee:

Conexant, Inc. - Red Bank NJ

International Classification:

H04L 12/40

US Classification:

370438, 370463, 370469

Abstract:

A novel implementation of a partitioned medium access control (MAC) is disclosed. The illustrative embodiment employs a shared bus that typically is already present in a wireless terminal for communication between an upper MAC and a lower MAC. The partitioned MAC implementation therefore does not require any additional communication means between the upper MAC and lower MAC, resulting in a lower-cost system. In addition, the upper MAC and lower MAC pass native data structures by reference over the shared bus, thereby eliminating the need for drivers to coordinate communication via interrupts, handshaking, etc. The partitioned MAC implementation results in a cost-effective distributed architecture in which the upper MAC resides in the terminal's host processor, and the lower MAC resides in the terminal's wireless station.

US Patent:

7434039, Oct 7, 2008

Filed:

Sep 7, 2006

Appl. No.:

11/470728

Inventors:

Michael Andrew Fischer - San Antonio TX, US

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

G06F 9/48

US Classification:

712244, 712228

Abstract:

A technique for enabling a computer processor to be capable of responding with comparable efficiency to both: (i) events whose handling is independent on the state of the software machine that responds to the events, and (ii) events whose handling is dependent on the state of the software machine that responds to the events. Each time a software state machine enters a state, one or more event control registers are programmed to direct the illustrative embodiment where to resume execution when each possible event occurs. This enables the illustrative embodiment to automatically branch to the code that is appropriate for the combination of the event and the state of the software machine.