Patrick K M Lee

US Patent:

7539924, May 26, 2009

Filed:

Nov 15, 2005

Appl. No.:

11/280017

Inventors:

Steven R. Vasquez - Rancho Santa Margarita CA, US
Patrick J. Lee - Foothill Ranch CA, US

Assignee:

Western Digital Technologies, Inc. - Lake Forest CA

International Classification:

G11C 29/00

US Classification:

714770

Abstract:

A disk drive is disclosed including a disk having a plurality of data tracks, wherein each data track includes a plurality of data sectors. A head is actuated over the disk for accessing the data sectors. A write command is received from a host, wherein the write command includes a host block and corresponding host block address. The host block is partitioned into a plurality of sub blocks, and a plurality of sub block addresses are generated in response to the host block address, wherein each sub block address corresponds to one of the sub blocks. Error detection code (EDC) data is generated for each sub block in response to the sub block and corresponding sub block address. Each sub block and corresponding EDC data are combined to generate a plurality of partial codewords that are written to the data sectors corresponding to the sub block addresses.

US Patent:

7832861, Nov 16, 2010

Filed:

Dec 28, 2009

Appl. No.:

12/647720

Inventors:

Patrick Lee - Los Alamitos CA, US

International Classification:

G02C 7/06

US Classification:

351169, 351177

Abstract:

A method of making a reverse progressive lens has the steps of selecting a standard progressive lens having a distance zone, a transition zone and a near zone; selecting an add determination that is double or more than double in power; reversing the regular progressive lens by orienting it upside down; and cutting away the near zone so that the transition zone becomes the new near zone. To maintain convergence of the corridor channel, one by orders the OS lens with the OD power and the OD lens with the OS power. The method also includes measuring a distance PD, measuring the segment height and keeping the same cylinder axis such that rotating the lens 180 does not change the axis position. Selecting a standard progressive lens may include one with a distance zone, a corridor/transition zone and a near zone.

US Patent:

8413010, Apr 2, 2013

Filed:

Mar 12, 2009

Appl. No.:

12/403257

Inventors:

Steven R. Vasquez - Rancho Santa Margarita CA, US
Patrick J. Lee - San Jose CA, US

Assignee:

Western Digital Technologies, Inc. - Lake Forest CA

International Classification:

H03M 13/00
G11C 29/00

US Classification:

714758, 714764, 714795

Abstract:

A data storage device is disclosed that receives a read command from a host, wherein the read command comprises a read logical block address (LBA_R). A target data sector is read in response to the LBA_R to generate a read signal. The read signal is processed to detect user data and redundancy data using a soft-output detector that outputs quality metrics for the user data and redundancy data. A high quality metric is assigned to the LBA_R, and errors are corrected in the user data using an error correction code (ECC) decoder in response to the quality metrics output by the soft-output detector and the quality metrics assigned to the LBA_R.

US Patent:

8433977, Apr 30, 2013

Filed:

Apr 13, 2009

Appl. No.:

12/422738

Inventors:

Steven R. Vasquez - Rancho Santa Margarita CA, US
Patrick J. Lee - San Jose CA, US

Assignee:

Western Digital Technologies, Inc. - Irvine CA

International Classification:

G11C 29/00

US Classification:

714770, 711 4, 711112, 711113

Abstract:

A storage device is disclosed comprising control circuitry. A write command is received from a host, wherein the write command comprises a host block and corresponding host block address. The host block is partitioned into a plurality of sub blocks, and a plurality of sub block addresses are generated in response to the host block address, wherein each sub block address corresponds to one of the sub blocks. Error detection code (EDC) data is generated for each sub block in response to the sub block and corresponding sub block address. Each sub block and corresponding EDC data are combined to generate a plurality of partial codewords that are written to one or more data sectors corresponding to the sub block addresses.

US Patent:

8553968, Oct 8, 2013

Filed:

Feb 18, 2005

Appl. No.:

11/060901

Inventors:

Patrick J. Lee - Foothill Ranch CA, US
Mark D. Thomas - Hollister CA, US

Assignee:

Western Digital Technologies, Inc. - Irvine CA

International Classification:

G06K 9/00

US Classification:

382141, 382220, 382309

Abstract:

A serial number detector is disclosed for detecting an encoded serial number written on a wafer. A scanner scans the wafer to generate a raster image representing the encoded serial number, and an optical character recognition (OCR) system detects a detected serial number comprising a plurality of detected data characters and a plurality of detected redundancy characters. A character-to-binary converter converts the detected data characters and the detected redundancy characters into codeword symbols. A syndrome generator generates a plurality of error syndromes in response to the codeword symbols, and an error corrector, responsive to the error syndromes, detects and corrects errors in the codeword symbols.

US Patent:

20210374080, Dec 2, 2021

Filed:

Jun 1, 2021

Appl. No.:

17/336262

Inventors:

- Irvine CA, US
Jerry ALSTON - Coto de Caza CA, US
Patrick LEE - Irvine CA, US
Scott MILTON - Irvine CA, US
Jeekyoung PARK - Irvine CA, US

International Classification:

G06F 13/16
G06F 12/0891
G06F 12/0862

Abstract:

A memory expansion device operable with a host computer system (host) comprises a non-volatile memory (NVM) subsystem, cache memory, and control logic configurable to receive a submission from the host including a read command and specifying a payload in the NVM subsystem and demand data in the payload. The control logic is configured to request ownership of a set of cache lines corresponding to the payload, to indicate completion of the submission after acquiring ownership of the cache lines, and to load the payload to the cache memory. The set of cache lines correspond to a set of cache lines in a coherent destination memory space accessible by the host. The control logic is further configured to, after indicating completion of the submission and in response to a request from the host to read demand data in the payload, return the demand data after determining that the demand data is in the cache memory.