Quan J Tran

US Patent:

6509622, Jan 21, 2003

Filed:

Aug 23, 2000

Appl. No.:

09/644639

Inventors:

Qing Ma - San Jose CA
Jin Lee - Palo Alto CA
Quan Tran - San Jose CA
Harry Fujimoto - Sunnyvale CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 27095

US Classification:

257483, 438132, 438215, 438601

Abstract:

An integrated circuit including a die having a circuit area and a plurality of guard rings. The circuit area includes active devices, passive devices, and interconnects connected to form an integrated circuit. The plurality of guard rings includes a plurality of stacked guard rings having substantially equal widths and encircling the circuit area. Alternatively, the plurality of guard rings includes metallization level guard rings interleaved with one or more via level guard rings. Each of the one or more via level guard rings includes one or more guard rings encircling the circuit area. Alternatively, the plurality of guard rings includes a plurality of concentric guard rings encircling the circuit area. Each of the plurality of guard rings is fabricated from a metal, such as aluminum, copper, or silver, or an alloy of aluminum, copper, or silver.

US Patent:

6617682, Sep 9, 2003

Filed:

Sep 28, 2000

Appl. No.:

09/675112

Inventors:

Qing Ma - San Jose CA
Jim Maveety - San Jose CA
Quan Tran - San Jose CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 2334

US Classification:

257706, 257713, 174253

Abstract:

A microelectronic die is aligned with a package substrate and attached to it using solder balls. A specially shaped heat spreader, preferably with a coefficient of thermal expansion (CTE) similar to that of silicon, is attached to the back side of the die using a heat-conducting adhesive. An epoxy-based material is flowed into the gap between the die, the substrate, and the heat spreader via a through-hole in either the substrate or the heat spreader using a dispense process or a transfer molding process. By positioning the heat spreader to abut the die corners and/or edges, the stresses on the die are substantially reduced or eliminated.

US Patent:

6673697, Jan 6, 2004

Filed:

Apr 3, 2002

Appl. No.:

10/114694

Inventors:

Qing Ma - San Jose CA
Valluri Rao - Saratoga CA
Li-Peng Wang - Santa Clara CA
John Heck - Mtn View CA
Quan Tran - San Jose CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 2130

US Classification:

438455, 438456

Abstract:

A microelectromechanical system may be enclosed in a hermetic cavity defined by joined, first and second semiconductor structures. The joined structures may be sealed by a solder sealing ring, which extends completely around the cavity. One of the semiconductor structures may have the system formed thereon and an open area may be formed underneath said system. That open area may be formed from the underside of the structure and may be closed by covering with a suitable film in one embodiment.

US Patent:

6686820, Feb 3, 2004

Filed:

Jul 11, 2002

Appl. No.:

10/194096

Inventors:

Qing Ma - San Jose CA
Valluri Rao - Saratoga CA
John Heck - Mtn View CA
Li-Peng Wang - Santa Clara CA
Dong Shim - Framingham MA
Quan Tran - San Jose CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01P 110

US Classification:

333262, 333258

Abstract:

This application discloses a microelectromechanical (MEMS) switch apparatus comprising an anchor attached to a substrate and an electrically conductive beam attached to the anchor and in electrical contact therewith. The beam comprises a tapered portion having a proximal end and a distal end, the proximal end being attached to the anchor, an actuation portion attached to the distal end of the tapered portion, a tip attached to the actuation portion, the tip having a contact dimple thereon. The switch apparatus also includes an actuation electrode attached to the substrate and positioned between the actuation portion and the substrate. Additional embodiments are also described and claimed.

US Patent:

6794223, Sep 21, 2004

Filed:

Jun 23, 2003

Appl. No.:

10/602137

Inventors:

Qing Ma - San Jose CA
Jim Maveety - San Jose CA
Quan Tran - San Jose CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 2144

US Classification:

438122, 438108, 438126, 438127

Abstract:

A microelectronic die is aligned with a package substrate and attached to it using solder balls. A specially shaped heat spreader, preferably with a coefficient of thermal expansion (CTE) similar to that of silicon, is attached to the back side of the die using a heat-conducting adhesive. An epoxy-based material is flowed into the gap between the die, the substrate, and the heat spreader via a through-hole in either the substrate or the heat spreader using a dispense process or a transfer molding process. By positioning the heat spreader to abut the die corners and/or edges, the stresses on the die are substantially reduced or eliminated.

US Patent:

6809617, Oct 26, 2004

Filed:

Dec 17, 2002

Appl. No.:

10/322157

Inventors:

Qing Ma - San Jose CA
Joseph Hayden, III - Sunnyvale CA
Quan Tran - Fremont CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01P 308

US Classification:

333238, 333105

Abstract:

Coplanar waveguides have a center signal line and a pair of ground lines on either side formed of a sputtered material such as gold (Au). Such waveguides are subject to what is known as the edge effect at high frequency operation causing currents to concentrate and flow along adjacent edges of the lines. Providing a thicker plated layer only on adjacent edges of the lines provide substantial performance improvements over sputtered lines alone while saving significant amount of Au, thus reducing costs.

US Patent:

6812814, Nov 2, 2004

Filed:

Oct 7, 2003

Appl. No.:

10/681550

Inventors:

Qing Ma - San Jose CA
Valluri Rao - Saratoga CA
John Heck - Mtn View CA
Li-Peng Wang - Santa Clara CA
Dong Shim - Framingham MA
Quan Tran - San Jose CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01P 110

US Classification:

333262, 333105, 200181

Abstract:

This application discloses a microelectromechanical (MEMS) switch apparatus comprising an anchor attached to a substrate and an electrically conductive beam attached to the anchor and in electrical contact therewith. The beam comprises a tapered portion having a proximal end and a distal end, the proximal end being attached to the anchor, an actuation portion attached to the distal end of the tapered portion, a tip attached to the actuation portion, the tip having a contact dimple thereon. The switch apparatus also includes an actuation electrode attached to the substrate and positioned between the actuation portion and the substrate. Additional embodiments are also described and claimed.

US Patent:

6903452, Jun 7, 2005

Filed:

Aug 19, 2003

Appl. No.:

10/643427

Inventors:

Qing Ma - San Jose CA, US
Valluri Rao - Saratoga CA, US
Li-Peng Wang - Santa Clara CA, US
John Heck - Mtn View CA, US
Quan Tran - San Jose CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L023/02
H01L023/34
H01L023/48

US Classification:

257680, 257724, 257778

Abstract:

A microelectromechanical system may be enclosed in a hermetic cavity defined by joined, first and second semiconductor structures. The joined structures may be sealed by a solder sealing ring, which extends completely around the cavity. One of the semiconductor structures may have the system formed thereon and an open area may be formed underneath said system. That open area may be formed from the underside of the structure and may be closed by covering with a suitable film in one embodiment.