Robert J Lorenz

US Patent:

20150002121, Jan 1, 2015

Filed:

Jun 28, 2013

Appl. No.:

13/930037

Inventors:

Chi-Ming WANG - Canton MI, US
Masaki WASEKURA - Aichi-gun, JP
Robert D. LORENZ - Madison WI, US

Assignee:

WISCONSIN ALUMNI RESEARCH FOUNDATION - Madison WI
TOYOTA JIDOSHA KABUSHIKI KAISHA - Toyota-shi

International Classification:

H02M 3/335

US Classification:

323283

Abstract:

A DC-to-DC, converter that can reduce a loss of the converter is provided. The DC-to-DC converter includes an inductor, a switching transistor connected to the inductor, and a controller that drives the transistor. The controller acquires a next step reference value for the DC-to-DC converter in a sampling time Ta. The next step reference value is expressed by an output voltage of the DC-to-DC converter or a flux linkage of the inductor. The controller determines interpolating points between a current state value that corresponds to the current reference value and the next step reference value in a sampling time Ts that is shorter than the sampling time Ta based on a loss of the DC-to-DC converter while changing from the current state value to the next step reference value. The controller supplies to the switching transistor the PWM signals with a duty that corresponds to each of the interpolating points.