Seung Mok Choi

US Patent:

20150054139, Feb 26, 2015

Filed:

Oct 15, 2014

Appl. No.:

14/514425

Inventors:

- Grand Cayman, KY
Seung Man Choi - Loudonville NY, US

International Classification:

H01L 23/48

US Classification:

257621

Abstract:

Embodiments of the present invention provide a novel process integration for air gap formation at the sidewalls for a Through Silicon Via (TSV) structure. The sidewall air gap formation scheme for the TSV structure of disclosed embodiments reduces parasitic capacitance and depletion regions in between the substrate silicon and TSV conductor, and serves to also reduce mechanical stress in silicon substrate surrounding the TSV conductor.

US Patent:

20140264921, Sep 18, 2014

Filed:

Mar 29, 2013

Appl. No.:

13/853178

Inventors:

GLOBAL FOUNDRIES Inc. - , US
Seung Man Choi - Loudonville NY, US

Assignee:

GLOBAL FOUNDRIES Inc. - Grand Cayman

International Classification:

H01L 21/768
H01L 23/538

US Classification:

257774, 438667

Abstract:

Embodiments of the present invention provide a novel process integration for air gap formation at the sidewalls for a Through Silicon Via (TSV) structure. The sidewall air gap formation scheme for the TSV structure of disclosed embodiments reduces parasitic capacitance and depletion regions in between the substrate silicon and TSV conductor, and serves to also reduce mechanical stress in silicon substrate surrounding the TSV conductor.