Siu Ming Cheng

US Patent:

8227352, Jul 24, 2012

Filed:

Apr 25, 2011

Appl. No.:

13/093679

Inventors:

Hang Yu - Woodland CA, US
Deenesh Padhi - Sunnyvale CA, US
Man-Ping Cai - Saratoga CA, US
Naomi Yoshida - Sunnyvale CA, US
Li Yan Miao - San Francisco CA, US
Siu F. Cheng - Los Angeles CA, US
Shahid Shaikh - Santa Clara CA, US
Sohyun Park - Fremont CA, US
Heung Lak Park - Santa Clara CA, US
Bok Hoen Kim - San Jose CA, US

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H01L 21/308
H01L 21/32

US Classification:

438703, 438761, 257E21258, 257E21231

Abstract:

Embodiments described herein relate to materials and processes for patterning and etching features in a semiconductor substrate. In one embodiment, a method of forming a composite amorphous carbon layer for improved stack defectivity on a substrate is provided. The method comprises positioning a substrate in a process chamber, introducing a hydrocarbon source gas into the process chamber, introducing a diluent source gas into the process chamber, introducing a plasma-initiating gas into the process chamber, generating a plasma in the process chamber, forming an amorphous carbon initiation layer on the substrate, wherein the hydrocarbon source gas has a volumetric flow rate to diluent source gas flow rate ratio of 1:12 or less; and forming a bulk amorphous carbon layer on the amorphous carbon initiation layer, wherein a hydrocarbon source gas used to form the bulk amorphous carbon layer has a volumetric flow rate to a diluent source gas flow rate of 1:6 or greater to form the composite amorphous carbon layer.

US Patent:

8349741, Jan 8, 2013

Filed:

Apr 25, 2012

Appl. No.:

13/455916

Inventors:

Hang Yu - Woodland CA, US
Deenesh Padhi - Sunnyvale CA, US
Man-Ping Cai - Saratoga CA, US
Naomi Yoshida - Sunnyvale CA, US
Li Yan Miao - San Francisco CA, US
Siu F. Cheng - Los Angeles CA, US
Shahid Shaikh - Santa Clara CA, US
Sohyun Park - Fremont CA, US
Heung Lak Park - Santa Clara CA, US
Bok Hoen Kim - San Jose CA, US

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H01L 21/308
H01L 21/32

US Classification:

438703, 438761, 257E21258, 257E21231

Abstract:

Embodiments described herein relate to materials and processes for patterning and etching features in a semiconductor substrate. In one embodiment, a method of forming a composite amorphous carbon layer is provided. The method comprises positioning a substrate in a process chamber, introducing a hydrocarbon source gas into the process chamber, introducing a diluent source gas into the process chamber, introducing a plasma-initiating gas into the process chamber, generating a plasma in the process chamber, forming an amorphous carbon initiation layer on the substrate, wherein the hydrocarbon source gas has a volumetric flow rate to diluent source gas flow rate ratio of 1:12 or less, and forming a bulk amorphous carbon layer on the amorphous carbon initiation layer, wherein a hydrocarbon source gas used to form the bulk amorphous carbon layer has a volumetric flow rate to a diluent source gas flow rate of 1:6 or greater.

US Patent:

8569105, Oct 29, 2013

Filed:

Apr 25, 2012

Appl. No.:

13/456058

Inventors:

Siu F. Cheng - Los Angeles CA, US
Deenesh Padhi - Sunnyvale CA, US

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H01L 21/00

US Classification:

438104, 438623, 438628, 257 4, 257E45003, 257E21006

Abstract:

A method and apparatus is provided for forming a resistive memory device having good adhesion among the components thereof. A first conductive layer is formed on a substrate, and the surface of the first conductive layer is treated to add adhesion promoting materials to the surface. The adhesion promoting materials may form a layer on the surface, or they may incorporate into the surface or merely passivate the surface of the first conductive layer. A variable resistance layer is formed on the treated surface, and a second conductive layer is formed on the variable resistance layer. Adhesion promoting materials may also be included at the interface between the variable resistance layer and the second conductive layer.

US Patent:

20110159211, Jun 30, 2011

Filed:

Dec 21, 2010

Appl. No.:

12/974365

Inventors:

Dale R. Du Bois - Los Gatos CA, US
Mohamad A. Ayoub - Las Gatos CA, US
Robert Kim - Mountain View CA, US
Amit Bansal - Santa Clara CA, US
Mark Fodor - Los Gatos CA, US
Binh Nguyen - San Jose CA, US
Siu F. Cheng - Los Angeles CA, US
Hang Yu - Woodland CA, US
Chiu Chan - Foster City CA, US
Ganesh Balasubramanian - Sunnyvale CA, US
Deenesh Padhi - Sunnyvale CA, US
Juan Carlos Rocha - San Carlos CA, US

Assignee:

APPLIED MATERIALS, INC. - Santa Clara CA

International Classification:

C23C 16/00
B05C 11/00

US Classification:

427569, 118 71

Abstract:

Embodiments of the invention contemplate a shadow ring that provides increased or decreased and more uniform deposition on the edge of a wafer. By removing material from the top and/or bottom surfaces of the shadow ring, increased edge deposition and bevel coverage can be realized. In one embodiment, the material on the bottom surface is reduced by providing a recessed slot on the bottom surface. By increasing the amount of material of the shadow ring, the edge deposition and bevel coverage is reduced. Another approach to adjusting the deposition at the edge of the wafer includes increasing or decreasing the inner diameter of the shadow ring. The material forming the shadow ring may also be varied to change the amount of deposition at the edge of the wafer.

US Patent:

20120043518, Feb 23, 2012

Filed:

Aug 18, 2010

Appl. No.:

12/859230

Inventors:

Siu F. CHENG - Los Angeles CA, US
Heung Lak PARK - Santa Clara CA, US
Deenesh PADHI - Sunnyvale CA, US

Assignee:

APPLIED MATERIALS, INC. - Santa Clara CA

International Classification:

H01L 29/04
H01L 47/00

US Classification:

257 4, 257 2, 438482, 257E47005, 257E29003

Abstract:

An electronic device comprises a variable resistance memory element on a substrate. The variable resistance memory element comprises (i) an amorphous carbon layer comprising a hydrogen content of at least about 30 atomic percent, and a maximum leakage current of less than about 1×10amps, and (ii) a pair of electrodes about the amorphous carbon layer. Methods of fabricating this and other devices are also described.

US Patent:

20230049702, Feb 16, 2023

Filed:

Sep 7, 2022

Appl. No.:

17/939744

Inventors:

- Redondo Beach CA, US
Siu Fai Cheng - Culver City CA, US
Robert F. Hicks - Los Angeles CA, US

Assignee:

Surfx Technologies LLC - Redondo Beach CA

International Classification:

H01J 37/32
H01L 21/67
H01L 21/02
H01L 21/48
C23C 16/50

Abstract:

Plasma applications are disclosed that operate with argon and other molecular gases at atmospheric pressure, and at low temperatures, and with high concentrations of reactive species. The plasma apparatus and the enclosure that contains the plasma apparatus and the substrate are substantially free of particles, so that the substrate does not become contaminated with particles during processing. The plasma is developed through capacitive discharge without streamers or micro-arcs. The techniques can be employed to remove organic materials from a substrate, thereby cleaning the substrate; to activate the surfaces of materials, thereby enhancing bonding between the material and a second material; to etch thin films of materials from a substrate; and to deposit thin films and coatings onto a substrate; all of which processes are carried out without contaminating the surface of the substrate with substantial numbers of particles.

US Patent:

20190153592, May 23, 2019

Filed:

Jan 28, 2019

Appl. No.:

16/259011

Inventors:

- Santa Clara CA, US
Mohamad A. AYOUB - Los Gatos CA, US
Robert KIM - San Francisco CA, US
Amit Kumar BANSAL - Milpitas CA, US
Mark FODOR - Los Gatos CA, US
Binh NGUYEN - San Jose CA, US
Siu F. CHENG - Culver City CA, US
Hang YU - Woodland CA, US
Chiu CHAN - Foster City CA, US
Ganesh BALASUBRAMANIAN - Fremont CA, US
Deenesh PADHI - Sunnyvale CA, US
Juan Carlos ROCHA - San Carlos CA, US

International Classification:

C23C 16/04
C23C 16/458
C23C 16/455
C23C 16/44
H01J 37/32
C23C 14/04
H01L 21/687
C30B 25/12
H01J 37/34

Abstract:

Embodiments of the invention contemplate a shadow ring that provides increased or decreased and more uniform deposition on the edge of a wafer. By removing material from the top and/or bottom surfaces of the shadow ring, increased edge deposition and bevel coverage can be realized. In one embodiment, the material on the bottom surface is reduced by providing a recessed slot on the bottom surface. By increasing the amount of material of the shadow ring, the edge deposition and bevel coverage is reduced. Another approach to adjusting the deposition at the edge of the wafer includes increasing or decreasing the inner diameter of the shadow ring. The material forming the shadow ring may also be varied to change the amount of deposition at the edge of the wafer.