Xue Xian Chen

US Patent:

20230116129, Apr 13, 2023

Filed:

Dec 6, 2022

Appl. No.:

18/062495

Inventors:

- Boise ID, US
Adam L. Olson - Boise ID, US
William R. Brown - Boise ID, US
Ho Seop Eom - Boise ID, US
Xue Chen - Boise ID, US
Kaveri Jain - Boise ID, US
Scott Schuldenfrei - Boise ID, US

International Classification:

H01L 21/027
C08G 81/00
H01L 21/033
H01L 21/3105
B81C 1/00
C08L 53/00
H01L 21/02

Abstract:

A self-assembled nanostructure comprises first domains and second domains. The first domains comprise a first block of a block copolymer material and an activatable catalyst. The second domains comprise a second block and substantially without the activatable catalyst. The activatable catalyst is capable of generating catalyst upon application of activation energy, and the generated catalyst is capable of reacting with a metal oxide precursor to provide a metal oxide. A semiconductor structure comprises such self-assembled nanostructure on a substrate.

US Patent:

20200321283, Oct 8, 2020

Filed:

Apr 2, 2019

Appl. No.:

16/372950

Inventors:

- Boise ID, US
Kari McLaughlin - Boise ID, US
Mario J. Di Cino - Boise ID, US
Xue Chen - Boise ID, US
Lane A. Gray - Boise ID, US
Joseph G. Lindsey - Kuna ID, US

International Classification:

H01L 23/544
H01L 21/768
H01L 21/3213
H01L 21/027
H01L 23/528

Abstract:

Methods, apparatuses, and systems related to determining overlay of features of a memory array are described. An example method includes forming a plurality of contacts on a working surface and selectively forming a first portion of a layer of conductive lines and a second portion of the layer of conductive lines in contact with the contacts. The first portion of the layer of conductive lines formed over the working surface is separated from the second portion of the layer of conductive lines formed over the working surface by a gap. The method includes determining an overlay of at least one of the contacts formed over the working surface in the gap relative to one of the conductive lines formed over the working surface.

US Patent:

20180366406, Dec 20, 2018

Filed:

Jul 23, 2018

Appl. No.:

16/042255

Inventors:

- Boise ID, US
Kaveri Jain - Boise ID, US
Lijing Gou - Boise ID, US
William R. Brown - Boise ID, US
Ho Seop Eom - Boise ID, US
Xue (Gloria) Chen - Boise ID, US
Anton J. deVilliers - Clifton Park NY, US

International Classification:

H01L 23/528
H01L 21/467
H01L 23/52
H01L 21/768
H01L 21/027
H01L 21/308
H01L 21/02

Abstract:

A method of forming a semiconductor structure comprises forming pools of acidic or basic material in a substrate structure. A resist is formed over the pools of acidic or basic material and the substrate structure. The acidic or basic material is diffused from the pools into portions of the resist proximal to the pools more than into portions of the resist distal to the pools. Then, the resist is exposed to a developer to remove a greater amount of the resist portions proximal to the pools compared to the resist portions distal to the pools to form openings in the resist. The openings have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure. The method may further comprise forming features in the openings of the resist. The features have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure.

US Patent:

20180337035, Nov 22, 2018

Filed:

Jul 30, 2018

Appl. No.:

16/049329

Inventors:

- Boise ID, US
Adam L. Olson - Boise ID, US
William R. Brown - Boise ID, US
Ho Seop Eom - Boise ID, US
Xue Chen - Boise ID, US
Kaveri Jain - Boise ID, US
Scott Schuldenfrei - Boise ID, US

International Classification:

H01L 21/027
H01L 21/3105
H01L 21/033
H01L 21/02
B81C 1/00
C08L 53/00
C08G 81/00

Abstract:

A self-assembled nanostructure comprises first domains and second domains. The first domains comprise a first block of a block copolymer material and an activatable catalyst. The second domains comprise a second block and substantially without the activatable catalyst. The activatable catalyst is capable of generating catalyst upon application of activation energy, and the generated catalyst is capable of reacting with a metal oxide precursor to provide a metal oxide. A semiconductor structure comprises such self-assembled nanostructure on a substrate.

US Patent:

20170263552, Sep 14, 2017

Filed:

May 26, 2017

Appl. No.:

15/606312

Inventors:

- Boise ID, US
Kaveri Jain - Boise ID, US
Lijing Gou - Boise ID, US
William R. Brown - Boise ID, US
Ho Seop Eom - Boise ID, US
Xue (Gloria) Chen - Boise ID, US
Anton J. deVilliers - Clifton Park NY, US

International Classification:

H01L 23/528
H01L 21/027
H01L 23/52
H01L 21/467
H01L 21/308
H01L 21/02
H01L 21/768

Abstract:

A method of forming a semiconductor structure comprises forming pools of acidic or basic material in a substrate structure. A resist is formed over the pools of acidic or basic material and the substrate structure. The acidic or basic material is diffused from the pools into portions of the resist proximal to the pools more than into portions of the resist distal to the pools. Then, the resist is exposed to a developer to remove a greater amount of the resist portions proximal to the pools compared to the resist portions distal to the pools to form openings in the resist. The openings have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure. The method may further comprise forming features in the openings of the resist. The features have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure.

US Patent:

20160307839, Oct 20, 2016

Filed:

Jun 24, 2016

Appl. No.:

15/192060

Inventors:

- Boise ID, US
Kaveri Jain - Boise ID, US
Lijing Gou - Boise ID, US
William R. Brown - Boise ID, US
Ho Seop Eom - Boise ID, US
Xue Chen - Boise ID, US
Anton J. deVilliers - Clifton Park NY, US

International Classification:

H01L 23/528
H01L 21/308
H01L 21/768

Abstract:

A method of forming a semiconductor structure comprises forming pools of acidic or basic material in a substrate structure. A resist is formed over the pools of acidic or basic material and the substrate structure. The acidic or basic material is diffused from the pools into portions of the resist proximal to the pools more than into portions of the resist distal to the pools. Then, the resist is exposed to a developer to remove a greater amount of the resist portions proximal to the pools compared to the resist portions distal to the pools to form openings in the resist. The openings have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure. The method may further comprise forming features in the openings of the resist. The features have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure.

US Patent:

20160042941, Feb 11, 2016

Filed:

Oct 22, 2015

Appl. No.:

14/920018

Inventors:

- Boise ID, US
Adam L. Olson - Boise ID, US
William R. Brown - Boise ID, US
Ho Seop Eom - Boise ID, US
Xue Chen - Boise ID, US
Kaveri Jain - Boise ID, US
Scott Schuldenfrei - Boise ID, US

International Classification:

H01L 21/027
C08L 53/00
H01L 21/033
H01L 21/3105
H01L 21/02

Abstract:

A self-assembled nanostructure comprises first domains and second domains. The first domains comprise a first block of a block copolymer material and an activatable catalyst. The second domains comprise a second block and substantially without the activatable catalyst. The activatable catalyst is capable of generating catalyst upon application of activation energy, and the generated catalyst is capable of reacting with a metal oxide precursor to provide a metal oxide. A semiconductor structure comprises such self-assembled nanostructure on a substrate.

US Patent:

20160027638, Jan 28, 2016

Filed:

Oct 1, 2015

Appl. No.:

14/873089

Inventors:

- Boise ID, US
- Midland MI, US
- Marlborough MA, US
Ho Seop Eom - Boise ID, US
Xue Gloria Chen - Boise ID, US
Nik Mirin - Boise ID, US
Dan Millward - Boise ID, US
Peter Trefonas, III - Medway MA, US
Phillip Dene Hustad - Natick MA, US
Jong Keun Park - Westborough MA, US
Christopher Nam Lee - Austin TX, US

International Classification:

H01L 21/027
H01L 21/033

Abstract:

Some embodiments include methods of forming patterns. A first mask is formed over a material. The first mask has features extending therein and defines a first pattern. The first pattern has a first level of uniformity across a distribution of the features. A brush layer is formed across the first mask and within the features to narrow the features and create a second mask from the first mask. The second mask has a second level of uniformity across the narrowed features which is greater than the first level of uniformity. A pattern is transferred from the second mask into the material.