Ying Song Wang

US Patent:

6490279, Dec 3, 2002

Filed:

Jul 23, 1998

Appl. No.:

09/121586

Inventors:

Honglu Chen - Saratoga CA
Ying Wang - Sunnyvale CA

Assignee:

Advanced Communication Device, Inc. - Fremont CA

International Classification:

H04L 1256

US Classification:

370392, 370475, 711216

Abstract:

This invention discloses an improved address table apparatus that includes an address bus for receiving input data packets and for hashing a designated bucket number and extracting a key from each of the data packets. The address table apparatus further includes a plurality of memory banks connected to the address bus wherein each memory bank includes a plurality of memory buckets for storing a designation address (DA) and a port number in each of the buckets. The address table apparatus further includes a comparand bus connected to the address bus for receiving the key therefrom. The address table apparatus further includes a plurality of comparators each corresponding to one of the memory banks for receiving the designation address (DA) and the port number from the designated bucket from a corresponding memory bank. The comparators further connected to the comparand bus for receiving and comparing the key to the address from the designated bucket in each of the memory banks. The address table apparatus further includes a result bus connected to the comparators for displaying an output port number from one of the comparators if the key extracted from one the data packets matching the designation address (DA) from one of the designated buckets.

US Patent:

6654521, Nov 25, 2003

Filed:

Jan 23, 2002

Appl. No.:

10/056575

Inventors:

Yunlong Sheng - Fremont CA
Joshua E. Rothenberg - Fremont CA
HongPu Li - Fremont CA
Ying Wang - Fremont CA
Jason Zweiback - Fremont CA

Assignee:

Teraxion Inc. - Sainte-Foy

International Classification:

G02B 634

US Classification:

385 37

Abstract:

The present invention is directed to a system and method for designing efficient multi-channel FBG gratings using a pre-compensated phase mask for diffracting light for side-writing the grating on an optical fiber core. A desired phase function of the FBG is generated, specifically tailored to an effective spacing between the phase mask and the optical fiber core. From the phase function a phase mask is pre-compensated to offset diffraction effects associated with each longitudinal position of the FBG receiving light from two corresponding longitudinal positions of the phase mask substantially symmetrically spaced longitudinally relative to each particular longitudinal position of the FBG. The two corresponding longitudinal positions of the phase mask are spaced longitudinally from each other by a spacing determined by the effective spacing between the phase mask and fiber core and by the first order diffraction angle of light through the phase mask.

US Patent:

6721312, Apr 13, 2004

Filed:

Jun 1, 2001

Appl. No.:

09/872080

Inventors:

Ying Wang - Mountain View CA

Assignee:

Pluris, Inc. - Cupertino CA

International Classification:

H04L 1256

US Classification:

370380, 370392, 370401

Abstract:

In a data packet router, a router fabric card for routing data packets is provided. The router fabric card comprises a plurality of ingress/egress ports, the ports connected through a switching facility for switching connection states of the port paths between individual ingress paths and individual egress paths on the fabric card, and a scheduling component for scheduling communication between ports on the fabric card. Data coming into ingress on the card is organized into individual data-packet trains, each individual train comprising data packets and inserted data denoting a starting point and an ending point of a train. The switching facility recognizes the start data and the end data of a train and switches port paths to a next-assigned connection state accordingly.

US Patent:

6777676, Aug 17, 2004

Filed:

Nov 21, 2002

Appl. No.:

10/303267

Inventors:

Ying Wang - San Jose CA
Yeishin Tung - San Jose CA
Anne Testoni - Bolton MA

Assignee:

KLA-Tencor Technologies Corporation - Milpitas CA

International Classification:

G01N 2300

US Classification:

250310, 250306, 250307, 378 44, 378 45, 378 48, 257 48, 257750, 257754, 438 14, 438625, 438672, 3562371, 3562411, 356376

Abstract:

Disclosed are apparatus and methods for characterizing a potential defect of a semiconductor structure. A charged particle beam is scanned over a structure which has a potential defect. X-rays are detected from the scanned structure. The X-rays are in response to the charged particle beam being scanned over the structure. The potential defect of the scanned structure is characterized based on the detected X-rays. For example, it may be determined whether a potentially defective via has a SiO plug defect by comparing an X-ray count ratio of oxygen over silicon of the defective via with an X-ray count ratio of a known defect-free reference via. If the defective via has a relatively high ratio (more oxygen than silicon) as compared to the reference via, then it may be determined that a SiO plug defect is present within the defective via. Otherwise, the via may be defmed as having a different type of defect (e. g. , not a SiO plug defect) or defined resulting in a âfalseâ defect.

US Patent:

6924484, Aug 2, 2005

Filed:

Oct 22, 2003

Appl. No.:

10/691940

Inventors:

Ying Wang - San Jose CA, US
Anne Testoni - Bolton MA, US

Assignee:

KLA-Tencor Corporation - Milpitas CA

International Classification:

G01N023/223
H01J037/153

US Classification:

250310, 2504922, 250306, 250307

Abstract:

Disclosed are methods and apparatus for characterizing a potential void or voids by analyzing the X-ray count of one or more emitted X-ray species as emitted from an interconnect structure under test in response to a impinging beam, such as an electron beam, directed towards the sample surface. For example, this analysis may be used to determine whether the structure (e. g. , a contact, line or via) has one or more void(s). It may also he used to help determine where the void(s) are with respect to the interconnect structure. It may also be used to help determine other characteristics of the void(s) with respect to the interconnect structure such as the shape(s) and size(s) of the void(s). The analysis may also be used to help initially determine whether the structure under test is so out of specification that it cannot then be determined whether the structure has a defect of a particular type. This analysis can be used to evaluate the process variation of wafers.

US Patent:

7378418, May 27, 2008

Filed:

Dec 17, 2004

Appl. No.:

11/016135

Inventors:

Guixue Yu - Princeton Junction NJ, US
William R. Ewing - Yardley PA, US
Amarendra B. Mikkilineni - Easton PA, US
Annapurna Pendri - Glastonbury CT, US
Philip M. Sher - Plainsboro NJ, US
Samuel Gerritz - Guilford CT, US
Bruce A. Ellsworth - Princeton NJ, US
Gang Wu - Princeton NJ, US
Yanting Huang - Pennington NJ, US
Chongqing Sun - East Windsor NJ, US
Natesan Murugesan - Princeton Junction NJ, US
Zhengxiang Gu - Princeton NJ, US
Ying Wang - Princeton NJ, US
Doree Sitkoff - Dresher PA, US
Stephen R. Johnson - Erdenheim PA, US
Ximao Wu - Princeton Junction NJ, US

Assignee:

Bristol-Myers Squibb Company - Princeton NJ

International Classification:

C07D 487/04
A61K 31/4162
A61P 3/04
A61P 43/00

US Classification:

514248, 544236

Abstract:

The present application describes compounds according to Formula I, pharmaceutical compositions comprising at least one compound according to Formula I and optionally one or more additional therapeutic agents and methods of treatment using the compounds according to Formula I both alone and in combination with one or more additional therapeutic agents. The compounds have the general Formula I:.

US Patent:

7385922, Jun 10, 2008

Filed:

Apr 9, 2004

Appl. No.:

10/821367

Inventors:

Ying Wang - Mountain View CA, US

Assignee:

Pluris, Inc. - Cupertino CA

International Classification:

H04J 3/00
H04L 12/56

US Classification:

370230, 370392, 370474

Abstract:

In a data packet router, a router fabric card for routing data packets is provided. The router fabric card comprises a plurality of ingress/egress ports, the ports connected through a switching facility for switching connection states of the port paths between individual ingress paths and individual egress paths on the fabric card, and a scheduling component for scheduling communication between ports on the fabric card. Data coming into ingress on the card is organized into individual data-packet trains, each individual train comprising data packets and inserted data denoting a starting point and an ending point of a train. The switching facility recognizes the start data and the end data of a train and switches port paths to a next-assigned connection state accordingly.

US Patent:

7512674, Mar 31, 2009

Filed:

Jun 26, 2003

Appl. No.:

10/603995

Inventors:

Chetan Jain - Milpitas CA, US
Ying Wang - San Jose CA, US
Abhishek Chaudhary - San Jose CA, US
Rajagopalan Kannan - Campbell CA, US
Tong Luo - Fremont CA, US
Meera Sundaram - San Jose CA, US
Jiang Zhu - Santa Clara CA, US
Rajasekar Venkatesan - Saratoga CA, US

Assignee:

Ciena Corporation - Linthicum MD

International Classification:

G06F 15/173

US Classification:

709223, 709224

Abstract:

A framework is disclosed which enables a management system to manage completely different type of network elements (NEs) running different versions of their embedded software by introducing generic operational interfaces, generic data interfaces, information descriptors and self adaptive control mechanism. This Management system framework consists of mainly two parts a) core application and b) element-dependent components and c) a set of generic interfaces. When the management system is launched, it executes the core application. The core application comprises of network element independent version independent generic functionalities that can be used to interact with a variety of network elements and a dynamic control mechanism to make selection and placement of pluggable components at appropriate time and place during execution. After the core application is executed, whenever a need to manage one or more network elements, self adaptive control mechanism will take decision based on information descriptor of that target NE and NE type dependent version dependent modules are incorporated or “plugged in” with core application to produce an overall management mechanism to manage that target NE.