Gary W Lang

US Patent:

56639619, Sep 2, 1997

Filed:

Feb 24, 1995

Appl. No.:

8/393787

Inventors:

Louis Albert McRoberts - late of Scottsdale AZ
Kenneth Wayne Hines - Tempe AZ
Karl Eric Miller - Tempe AZ
Gary James Lang - Gilbert AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H04L 1256

US Classification:

370412

Abstract:

A communication network (10) includes packet switching nodes (18) in which packets from high speed data links (20, 22) are switched onto a multiplicity of low speed data links (26). Each node (18) includes a bulk RAM (30) which has a section (32) dedicated to implementing a multiplicity of logically independent FIFO buffers. A routing controller (46) controls DMA transfers of packets into and out from appropriate FIFO buffers. Packets are transferred into respective FIFO buffers consecutively and transferred out from respective FIFO buffers interleaved together.

US Patent:

61050954, Aug 15, 2000

Filed:

Feb 23, 1998

Appl. No.:

9/027819

Inventors:

Karl Eric Miller - Chandler AZ
Gary James Lang - Gilbert AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

G06F 1300

US Classification:

710107

Abstract:

A data processing system (20) schedules the allocation of a common bus (26), used by multiple service requesters (32). The system (20) creates a plurality of service request levels (44) and assigns each service requester (32) to one of the plurality of request levels (44). Services of the common bus (26) are provided to all service requesters (32) assigned to a first service request level (44) for each instance of providing service to one of the service requesters (32) assigned to a second service request level (44). The method then again provides services of the common bus (26) to all service requesters (32) assigned to the first service request level (44) for a single instance of providing service to one of the second level requesters (32).