Leon Hong Lin

US Patent:

6498577, Dec 24, 2002

Filed:

Jan 16, 2002

Appl. No.:

10/051736

Inventors:

Leon Chia-Liang Lin - Union City CA

Assignee:

Infineon Technologies AG - Munich

International Classification:

H03M 112

US Classification:

341156, 341155, 341138, 341144, 341108

Abstract:

A non-uniform analog-to-digital converter (ADC) produces digital output data representing the magnitude of an analog input signal having a non-uniform magnitude probability distribution. The digital output data represents the analog input signal with relatively high resolution for the input signals more frequently occurring magnitudes and with relatively lower resolution for the input signals less frequently occurring magnitudes.

US Patent:

7002931, Feb 21, 2006

Filed:

Jan 31, 2002

Appl. No.:

10/061924

Inventors:

Gerchih Chou - San Jose CA, US
Leon Chia-Liang Lin - Union City CA, US

Assignee:

Infineon Technologies North America Corp. - San Jose CA

International Classification:

H04B 3/20

US Classification:

370286, 375219, 307401, 307 43, 307 71, 326 30, 326 62, 327108, 370463, 370420

Abstract:

A 1000BASE-T transceiver linked to an unshielded twisted pair (UTP) through a transformer currently transmits and receives outgoing and incoming signals via the UTP. The transceiver employs an energy efficient class B or AB line driver supplying asymmetric output currents to the transformer's primary winding terminals so that the transformer's secondary winding induces the outgoing signal on the UTP. Resistors couple the transformer's primary winding terminals to inputs of separate amplifiers producing a differential output signal mimicking the incoming 1000BASE-T signal. Since both the incoming and outgoing signals contribute to voltages appearing at the transformer's primary winding terminals, echo cancellation circuits provide additional compensating signals to the amplifier inputs for canceling echo in each amplifier input due to the resistive and reactive loading on each driver output current and arising from the asymmetric nature of the class B or AB driver's output currents.

US Patent:

7106753, Sep 12, 2006

Filed:

Jan 25, 2002

Appl. No.:

10/057501

Inventors:

Leon Chia-Liang Lin - Union City CA, US

Assignee:

Infineon Technologies, Inc. - Munich

International Classification:

H04L 12/66
H04L 12/28

US Classification:

370463, 370419

Abstract:

Interconnected master and slave transceivers provide data communication between host computers. Each transceiver receives and encodes elements of a first data sequence from its local host computer at a first rate and employs a finite impulse response (FIR) filter to interpolate elements of the encoded first data sequence to produce elements of a second data sequence at a higher second rate controlled by a local clock signal. The second data sequence controls the amplitude of an analog signal sent to the other transceiver. Each transceiver also processes the analog signal arriving from the other transceiver to produce elements of a third data sequence at that second rate and employs a second FIR filter for Interpolating the third data sequence to produce elements of a fourth data sequence at the slower first rate. Fourth data sequence elements are then decoded to produce elements of a fifth sequence forwarded to the local host computer at the first rate.

US Patent:

7254194, Aug 7, 2007

Filed:

Jan 25, 2002

Appl. No.:

10/057502

Inventors:

Leon Chia-Liang Lin - Union City CA, US
Gerchih Chou - San Jose CA, US

Assignee:

Infineon Technologies North America Corp. - San Jose CA

International Classification:

H04L 27/08
H04B 1/16

US Classification:

375345, 375317, 375318, 4551272, 4551271, 4551942

Abstract:

A communication receiver amplifies a pulse-amplitude-modulated (PAM) signal representing an integer-valued sequence of first data elements (D) with an adjustable first gain (G) and digitizes the amplified signal to produce a sequence of second data elements (D) representing successive magnitudes of the PAM signal. A first automatic gain control (AGC) circuit determines the rate at which magnitudes of the second data sequence elements fall within a first range and adjusts G to maintain that rate within a second range. Digital signal processing circuits within the receiver process the second data to produce a sequence of third data elements (D), each having a real number value substantially equal to a product of a second gain G and a corresponding one of the first data elements D A slicer rounds the real number represented by each third data sequence element to produce a corresponding integer-valued element of a fourth data sequence (D). A second AGC circuit adjusts the second gain based on a combination of a sign of each fourth sequence element and a sign of a difference between corresponding third and fourth data sequence elements to keep each third data element as close as possible in value to its corresponding first data element.