Soon Ja Choi

US Patent:

20220253380, Aug 11, 2022

Filed:

Nov 20, 2021

Appl. No.:

17/531743

Inventors:

- Irvine CA, US
Jayesh R. Bhakta - Cerritos CA, US
Chi She Chen - Walnut CA, US
Jeffery C. Solomon - Irvine CA, US
Mario Jesus Martinez - Laguna Niguel CA, US
Hao Le - Santa Ana CA, US
Soon J. Choi - Irvine CA, US

International Classification:

G06F 12/02
G06F 12/08
G06F 12/0871
G06F 3/06
G11C 7/10
G06F 13/28
G06F 13/10
G06F 12/06

Abstract:

A memory module comprises a volatile memory subsystem including DRAM, a non-volatile memory subsystem including Flash memory, and a module control device. The Flash memory includes main Flash providing a main Flash memory space and scratch Flash providing a scratch Flash memory space. The module control device is configured to receive a request from the memory controller to move one or more segments of data in a first Flash block in the main Flash to the DRAM and to, for each respective segment of data: select a respective set of pages in the DRAM; transfer respective data stored in the respective set of pages from the DRAM to a corresponding segment in the scratch Flash; and transfer the respective segment of data to the respective set of pages in the DRAM. Thus, data can be moved segment by segment between the DRAM and the Flash memory.

US Patent:

20200042456, Feb 6, 2020

Filed:

Aug 13, 2019

Appl. No.:

16/539895

Inventors:

- Irvine CA, US
Jayesh R. Bhakta - Cerritos CA, US
Chi She Chen - Walnut CA, US
Jeffery C. Solomon - Irvine CA, US
Mario Jesus Martinez - Laguna Niguel CA, US
Hao Le - Santa Ana CA, US
Soon J. Choi - Irvine CA, US

International Classification:

G06F 12/0871

Abstract:

A memory module comprises a volatile memory subsystem configured to coupled to a memory channel in computer system and capable of serving as main memory for the computer system, a non-volatile memory subsystem providing storage for the computer system, and a module controller coupled to the volatile memory subsystem, the non-volatile memory subsystem, and the C/A bus. The module controller is configured to control intra-module data transfers between the volatile memory subsystem and the non-volatile memory subsystem. The module controller is further configured to monitor C/A signals on the C/A bus and schedule the intra-module data transfers in accordance with the C/A signals so that the intra-module data transfers do not conflict with accesses to the volatile memory subsystem by the memory controller.

US Patent:

20150169238, Jun 18, 2015

Filed:

Nov 7, 2014

Appl. No.:

14/536588

Inventors:

- Irvine CA, US
Jayesh R. Bhakta - Cerritos CA, US
Chi She Chen - Walnut CA, US
Jeffery C. Solomon - Irvine CA, US
Mario Jesus Martinez - Laguna Niguel CA, US
Hao Le - Santa Ana CA, US
Soon J. Choi - Irvine CA, US

International Classification:

G06F 3/06

Abstract:

A memory module comprises a volatile memory subsystem configured to coupled to a memory channel in computer system and capable of serving as main memory for the computer system, a non-volatile memory subsystem providing storage for the computer system, and a module controller coupled to the volatile memory subsystem, the non-volatile memory subsystem, and the C/A bus. The module controller is configured to control intra-module data transfers between the volatile memory subsystem and the non-volatile memory subsystem. The module controller is further configured to monitor C/A signals on the C/A bus and schedule the intra-module data transfers in accordance with the C/A signals so that the intra-module data transfers do not conflict with accesses to the volatile memory subsystem by the memory controller.