Abdolreza Abdolreza Langari

US Patent:

6359343, Mar 19, 2002

Filed:

Mar 5, 2001

Appl. No.:

09/799446

Inventors:

Abdolreza Langari - Newport Beach CA
Seyed Hassan Hashemi - Laguna Niguel CA

Assignee:

Conexant Systems, Inc. - Newport Beach CA

International Classification:

H01L 2329

US Classification:

257789, 257795, 257796, 22818022

Abstract:

Phase Change Material (âPCMâ) are used to reduce the range of temperature excursions in a semiconductor die attached to an interconnect substrate in the flip chip technology. In one embodiment a PCM underfill, which comprises PCM microspheres interspersed within a polymer, is dispensed in the interface area between the semiconductor die and the interconnect substrate. Reduction of the range of temperature excursions in the semiconductor die is achieved since the PCM underfill acts as a cushion to dampen the range of temperature excursions of the semiconductor die. During dissipation of power pulses in the semiconductor die, the PCM underfill absorbs energy from the semiconductor die by changing phase from solid to liquid without a concomitant rise in the temperature of the PCM underfill. Thus, the energy released when power pulses are being dissipated in the semiconductor die does not result in a rise in the temperature of the PCM underfill. Accordingly, the temperature of the semiconductor die which is in thermal contact with the PCM underfill is not abruptly increased during power pulses.

US Patent:

6586847, Jul 1, 2003

Filed:

Sep 14, 2000

Appl. No.:

09/661490

Inventors:

Abdolreza Langari - Newport Beach CA
Seyed H. Hashemi - Laguna Niguel CA

Assignee:

Skyworks Solutions, Inc. - Woburn MA

International Classification:

H01L 2329

US Classification:

257788, 313103, 313105, 313534, 4283227, 174250

Abstract:

Method and structure for temperature stabilization in semiconductor devices are disclosed. In one embodiment, a carbon-based polymer is deposited on top of an interconnect metal line in the semiconductor die where relatively large power dissipation is known to occur. Reduction of the range of temperature excursions in the semiconductor die is achieved since the polymer acts as a cushion to dampen the range of temperature excursions of the semiconductor die. During occurrence of power pulses in the semiconductor die, the polymer absorbs energy from the interconnect metal, and thus from the semiconductor devices that are connected to the interconnect metal, by expanding without a rise in the temperature of the polymer. The energy generated when power pulses are being dissipated in the semiconductor die does not result in a substantial rise in the temperature of the polymer. Accordingly, the temperature of the semiconductor devices that are connected to the interconnect metal is not abruptly increased during power pulses.

US Patent:

6848500, Feb 1, 2005

Filed:

Mar 11, 1999

Appl. No.:

09/266376

Inventors:

Abdolreza Langari - Newport Beach CA, US
Seyed Hassan Hashemi - Laguna Niguel CA, US

Assignee:

Skyworks Solutions, Inc. - Irvine CA

International Classification:

F28D 1500

US Classification:

16510433, 165 10, 165902, 361699, 257714

Abstract:

The invention discloses an apparatus for reducing peak temperatures and thermal excursions, of semiconductor devices, particularly in pulsed power applications. The apparatus comprises thermally coupling Phase Change Material (PCM) to the dissipating semiconductor device. PCM absorbs heat and stays at a constant temperature during its phase change from solid to liquid. The PCM melting point is chosen so that it is just below the temperature the device would otherwise achieve. When the device approaches the maximum temperature, the PCM melts, drawing heat from the device and lowering the device's peak temperature. As the device stops dissipating, after its pulse period, the PCM material solidifies releasing the heat it absorbed. The apparatus lowers the peak temperature by absorbing heat when the device is dissipating. The apparatus also keeps the semiconductor device from cooling off as much as it would cool without the apparatus, as the PCM material releases heat during the part of the cycle when it is re-solidifying, i. e.

US Patent:

62618717, Jul 17, 2001

Filed:

Jan 31, 2000

Appl. No.:

9/493591

Inventors:

Abdolreza Langari - Newport Beach CA
Seyed Hassan Hashemi - Laguna Niguel CA

Assignee:

Conexant Systems, Inc. - Newport Beach CA

International Classification:

H01L 2144
H01L 2148
H01L 2150

US Classification:

438124

Abstract:

Phase Change Material ("PCM") are used to reduce the range of temperature excursions in a semiconductor die attached to an interconnect substrate in the flip chip technology. In one embodiment a PCM underfill, which comprises PCM microspheres interspersed within a polymer, is dispensed in the interface area between the semiconductor die and the interconnect substrate. Reduction of the range of temperature excursions in the semiconductor die is achieved since the PCM underfill acts as a cushion to dampen the range of temperature excursions of the semiconductor die. During dissipation of power pulses in the semiconductor die, the PCM underfill absorbs energy from the semiconductor die by changing phase from solid to liquid without a concomitant rise in the temperature of the PCM underfill. Thus, the energy released when power pulses are being dissipated in the semiconductor die does not result in a rise in the temperature of the PCM underfill. Accordingly, the temperature of the semiconductor die which is in thermal contact with the PCM underfill is not abruptly increased during power pulses.

US Patent:

6134110, Oct 17, 2000

Filed:

Oct 13, 1998

Appl. No.:

9/170029

Inventors:

Abdolreza Langari - Garden Grove CA

Assignee:

Conexnant Systems, Inc. - Newport Beach CA

International Classification:

H05H 720

US Classification:

361700

Abstract:

The invention discloses an apparatus for cooling semiconductors which are mounted on substrates for the purpose of packaging. In some electronic packaging methods semiconductor dies are mounted on substrates instead of being encapsulated and mounted individually on circuit boards. This method can be beneficial from both cost and manufacturing standpoints but can lead to problems when semiconductor power chips on the substrate generate enough heat to cause excess heating of themselves and adjacent chips on the substrate. The invention discloses several methods of removing heat from the power chips in order to minimize the temperature within the semiconductor die and to minimize the conduction of heat to other devises mounted on the substrate. The invention involves using thermal vias (thermally conducting pathways) embedded in the substrate and circuit board on which the substrate sits to conduct heat from the semiconductor and away from the substrate. The invention also includes conducting heat using heat pipes connected to the thermal vias to conduct heat away from the chips and substrate and into surrounding structures.

US Patent:

20230036650, Feb 2, 2023

Filed:

Jul 27, 2021

Appl. No.:

17/386278

Inventors:

- San Diego CA, US
Aniket PATIL - San Diego CA, US
Hong Bok WE - San Diego CA, US
Abdolreza LANGARI - San Diego CA, US
Lisha ZHANG - San Diego CA, US

International Classification:

H01L 23/60
H01L 21/50
H01L 23/522

Abstract:

In an aspect, a semiconductor includes a substrate. The substrate includes a column comprising a conductive paste that passes through a plurality of metal layers, a resin sheath surrounding the column, a ground shield surrounding the resin sheath, and a plurality of sense lines. The plurality of sense lines include a first sense line that is connected to the column comprising the conductive paste and a second sense line that is connected to the ground shield. The resin comprises a dielectric material.