Abhijit Kumar Das
age ~47
from Fort Worth, TX
- Also known as:
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- Abhijit K Das
- Abjijit Das
Abhijit Das Phones & Addresses
- Fort Worth, TX
- 3800 Bonita Dr, Plano, TX 75025 • (469)2693195
- 14000 Noel Rd, Dallas, TX 75240 • (972)2399511
Work
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Company:Large power systems division - caterpillar (accs inc.Aug 2010
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Position:Fuel systems control engineer
Education
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School / High School:University of Texas at Arlington- Arlington, TXJan 2007
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Specialities:PhD in Electrical Engineering
Skills
Amazon
Iris Recognition In Eigen Space: A Book On Image Processing
view sourceThis work proposes novel approaches for iris recognition in the context of biometric identification of a person. The iris is a portion of the inner eye of an individual and contains an abstract and randomly generated texture pattern arising from orientation of complex tissues within this region. Thi...
Author
Abhijit Das
Binding
Paperback
Pages
112
Publisher
LAP LAMBERT Academic Publishing
ISBN #
3844355030
EAN Code
9783844355031
ISBN #
8
NONLINEAR AUTOPILOT DESIGN FOR AEROSPACE VEHICLES: NONLINEAR DESIGN OF 3-AXES AUTOPILOT FOR SHORT RANGE SKID-TO-TURN HOMING MISSILES
view sourceTraditionally, missile autopilots have been designed using linear control approaches with gain scheduling. Moreover, three single axis autopilots are usually designed without considering the interaction among the motion axes. Such designs cannot handle the coupling among pitch-yaw-roll channels, esp...
Author
Abhijit Das, Siddhartha Mukhopadhyay
Binding
Paperback
Pages
228
Publisher
VDM Verlag Dr. Müller
ISBN #
3639241207
EAN Code
9783639241204
ISBN #
7
ANCIENT INDIAN MEDICINE
view sourceANCIENT INDIAN MEDICINEAbhijit DaseBook published by IDEAINDIA.COM Abhijit Das 2008 Ayurveda is claimed to be the oldest and most complete medical treatises in the world. It is 7000 years old and is now becoming very popular in the West as an alternative form of medicine. The origin of Ayurveda is b...
Author
ABHIJIT DAS
Binding
Kindle Edition
Pages
25
Publisher
IDEAINDIA.COM
ISBN #
3
Progress in Cryptology - INDOCRYPT 2008: 9th International Conference on Cryptology in India, Kharagpur, India, December 14-17, 2008. Proceedings (Lecture Notes in Computer Science)
view sourceThis book constitutes the refereed proceedings of the 9th International Conference on Cryptology in India, INDOCRYPT 2008, held in Kharagpur, India, in December 2008. The 33 revised full papers were carefully reviewed and selected from 111 submissions. The papers are organized in topical sections on...
Binding
Paperback
Pages
437
Publisher
Springer
ISBN #
3540897534
EAN Code
9783540897538
ISBN #
6
Cooperative Control of Multi-Agent Systems: Optimal and Adaptive Design Approaches (Communications and Control Engineering)
view sourceCooperative Control of Multi-Agent Systems extends optimal control and adaptive control design methods to multi-agent systems on communication graphs. It develops Riccati design techniques for general linear dynamics for cooperative state feedback design, cooperative observer design, and cooperative...
Author
Frank L. Lewis, Hongwei Zhang, Kristian Hengster-Movric, Abhijit Das
Binding
Hardcover
Pages
307
Publisher
Springer
ISBN #
1447155734
EAN Code
9781447155737
ISBN #
2
Computational Number Theory (Discrete Mathematics and Its Applications)
view sourceDeveloped from the author’s popular graduate-level course, Computational Number Theory presents a complete treatment of number-theoretic algorithms. Avoiding advanced algebra, this self-contained text is designed for advanced undergraduate and beginning graduate students in engineering. It is also s...
Author
Abhijit Das
Binding
Hardcover
Pages
614
Publisher
Chapman and Hall/CRC
ISBN #
1439866155
EAN Code
9781439866153
ISBN #
1
Public-Key Cryptography: Theory and Practice
view sourcePublic-Key Cryptography: Theory and Practice provides a comprehensive coverage of the mathematical tools required for understanding the techniques of public-key cryptography and cryptanalysis. Key topics covered in the book include common cryptogra
Author
Abhijit Das, C. E. Veni Madhavan
Binding
Kindle Edition
Pages
584
Publisher
Pearson
ISBN #
4
Unmonitored intrapartum oxytocin use in home deliveries: evidence from Uttar Pradesh, India.: An article from: Reproductive Health Matters
view sourceThis digital document is an article from Reproductive Health Matters, published by Thomson Gale on November 1, 2007. The length of the article is 4831 words. The page length shown above is based on a typical 300-word page. The article is delivered in HTML format and is available in your Amazon.com D...
Author
Patricia Jeffery, Abhijit Das, Jashodhara Dasgupta, Roger Jeffery
Binding
Digital
Pages
17
Publisher
Thomson Gale
ISBN #
10
Isbn (Books And Publications)
HWWE 2005: Humanizing Work and Work Environment Proceedings of the International Ergonomics Conference
view sourceAuthor
Abhijit Das
ISBN #
8184241240
Wikipedia References
Abhijit Das
Us Patents
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Sigma-Delta Modulator
view source -
US Patent:8217816, Jul 10, 2012
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Filed:Oct 18, 2010
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Appl. No.:12/906798
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Inventors:Abhijit Kumar Das - Dallas TX, US
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Assignee:Texas Instruments Incorporated - Dallas TX
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International Classification:H03M 3/00
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US Classification:341143, 341139
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Abstract:A Sigma-Delta Modulator (SDM) has a summing junction that receives an input signal and a feedback signal, a multi-level analog-to-digital converter (ADC) that receives the SDM input signal and generates an ADC output, a first analog switch that receives the ADC output and generates a plurality of reference voltages, a second analog switch generating the feedback signal, where the feedback signal is selected from one of the reference voltages.
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Amplifier With Start-Up Common Mode Feedback
view source -
US Patent:8319554, Nov 27, 2012
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Filed:May 18, 2011
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Appl. No.:13/110750
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Inventors:Abhijit Kumar Das - Dallas TX, US
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Assignee:Texas Instruments Incorporated - Dallas TX
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International Classification:H03F 3/45
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US Classification:330258, 330260, 330261
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Abstract:An amplifier with a cascode device contains a common mode feedback circuit to ensure correct operating point in the amplifier. Common mode feedback is provided to the amplifier to maintain the common mode operating point during active operation. Additional common mode feedback is provided to the cascode devices to ensure correct start-up by forcing the node voltages to go to their desired voltage levels.
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High Speed Resistor-Dac For Sar Dac
view source -
US Patent:8395538, Mar 12, 2013
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Filed:Jun 20, 2011
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Appl. No.:13/164478
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Inventors:Abhijit Kurmar Das - Dallas TX, US
Joonsung Park - Dallas TX, US -
Assignee:Texas Instruments Incorporated - Dallas TX
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International Classification:H03M 1/34
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US Classification:341163, 341156, 341172
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Abstract:A singled-ended, successive approximation register analog-to-digital converter convert an analog input voltage to a digital representation comprising m upper order bits and a number of lower order bits. The SAR ADC comprises SAR logic, a resistive network, multiple switches, and first and second LSB capacitors. The switches also comprises two sets of switches coupled to the resistive network, each set of switches is configured to couple a selected tap to each of the first and second LSB capacitors. When determining the lower order bits, the SAR logic is configured to control the sets of switches to change the first and second taps from one cycle in which one of the lower order bits is determined to a next cycle in which the next of the lower order bits is determined so that the voltage of both taps changes by a decreasing amount with each succeeding bit being determined.
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Variable Gain Amplifier Having Automatic Power Consumption Optimization
view source -
US Patent:20110210793, Sep 1, 2011
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Filed:Jul 21, 2010
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Appl. No.:12/840933
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Inventors:Abhijit Kumar Das - Dallas TX, US
Michel Frechette - Plano TX, US -
Assignee:TEXAS INSTRUMENTS INCORPORATED - Dallas TX
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International Classification:H03F 3/45
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US Classification:330254, 330260
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Abstract:A variable gain amplifier may include a master amplifier that may be configured to generate a first current and a diode coupled with the master amplifier so that the first current passes through the diode which, when the first current is passing through the diode, generates a diode voltage signal. According to embodiments, an error amplifier may include a first input configured to receive a gain control voltage signal and a second input configured to receive the diode voltage signal. The output of the error amplifier may provide a feedback signal. The amplifier may include a circuit configured to generate at least one voltage control signal based on the feedback signal and a slave amplifier configured to adjust a gain amount based on the at least one voltage control signal.
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Resistor-Based Digital To Analog Converter
view source -
US Patent:20230103907, Apr 6, 2023
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Filed:Aug 23, 2022
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Appl. No.:17/894019
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Inventors:- Dallas TX, US
Abhijit Kumar DAS - Plano TX, US -
International Classification:H03M 1/06
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Abstract:Examples of this description provide for a circuit. In some examples, the circuit includes a resistive network, a least significant bit (LSB) capacitor selectively coupled via a switch to receive an analog input voltage or to a selected first tap in the resistive network, and a charge boost network coupled in parallel with the resistive network and to a midpoint of the resistive network. To determine a most significant bit of lower order bits of a digital representation of the analog input voltage, the charge boost network is coupled to the LSB capacitor.
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Level Shifter Circuit
view source -
US Patent:20230094930, Mar 30, 2023
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Filed:Sep 1, 2022
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Appl. No.:17/901377
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Inventors:- Dallas TX, US
Abhijit Das - Plano TX, US -
International Classification:H03K 19/0185
H03K 3/037 -
Abstract:A level shifter circuit is provided. In some examples, the level shifter circuit includes a first set of transistors and a second set of transistors coupled between first and second power supply nodes. The control terminals of the first and second lower transistors are coupled to an input node. The level shifter circuit also includes a third set of transistors and a fourth set of transistors coupled between first and third power supply nodes. A control terminal of a third lower transistor is coupled to a second intermediate node, and a control terminal of a fourth lower transistor is coupled to a first intermediate node. Control terminals of the first upper transistor and the fourth upper transistor are coupled to a third intermediate node. Control terminals of the second upper transistor and the third upper transistor are coupled to a fourth intermediate node.
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Comparator With Reduced Offset
view source -
US Patent:20230096787, Mar 30, 2023
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Filed:Feb 16, 2022
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Appl. No.:17/673224
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Inventors:- Dallas TX, US
Abhijit Kumar DAS - Plano TX, US -
Assignee:TEXAS INSTRUMENTS INCORPORATED - Dallas TX
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International Classification:H03K 5/24
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Abstract:A device includes a first transistor (M) having a control terminal that is a first comparator input, a first terminal that can be coupled to a voltage source, and a second terminal that provides a first comparator output; a second transistor (M) having a control terminal that is a second comparator input, a first terminal that can be coupled to the voltage source, and a second terminal that provides a second comparator output; a third transistor (M) having a control terminal coupled to M, and a first terminal coupled to ground; a fourth transistor (M) having a control terminal coupled to M, and a first terminal coupled to ground; first switches that couple M second terminal to M control terminal, and M second terminal to M control terminal; and second switches that couple M second terminal to the M second terminal, and M second terminal to the M second terminal.
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Successive Approximation Analog-To-Digital Converter
view source -
US Patent:20230099011, Mar 30, 2023
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Filed:Sep 30, 2021
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Appl. No.:17/490138
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Inventors:- Dallas TX, US
Abhijit Kumar Das - Plano TX, US -
International Classification:H03M 1/46
H03M 1/12
H03M 1/36 -
Abstract:An analog-to-digital converter (ADC) is provided. In some examples, the ADC includes a first reference voltage supply input, a second reference voltage supply input, a comparator comprising an input node, and a first reference switch coupled between the second reference voltage supply input and the input node of the comparator. The ADC also includes a set of capacitors, where each capacitor of the set of capacitors comprises a first terminal. In addition, the ADC includes a second reference switch coupled between the first reference voltage supply input and the first terminal of each capacitor of the set of capacitors. The ADC further includes a third switch coupled between the input node of the comparator and the first terminal of each capacitor of the set of capacitors.
Resumes
Abhijit Das
view sourceSenior Design Engineer
Bachelor of Engineering, Bachelors, Electronics Bidhan Nagar Govt High School
Soc
Asic
Analog
Analog Circuit Design
Cmos
Data Converter Circuit
Rx Design
Microcontrollers
Verilog
Embedded Systems
Rf
Debugging
Integrated Circuit Design
Ic
Semiconductors
Vlsi
Circuit Design
Cadence Virtuoso
Simulations
System on A Chip
Application Specific Integrated Circuits
Radio Frequency
Integrated Circuits
Very Large Scale Integration
C
Matlab
Electronics
Abhijit Das
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Abhijit Das
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Brooks School, North ando...
view sourceAdam Wachtel (1974-1978),
Michael Goldston (1997-2001),
Matthew Tuck (1978-1982),
Jonathan Block (1976-1980)
Abhijit Das, Class of 200...
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