Alan J Cook

Address:

3697 Mud Pike, Christiansbrg, VA 24073

VIN:

1G2ZA5EB4A4139784

Make:

PONTIAC

Model:

G6

Year:

2010

US Patent:

20230087217, Mar 23, 2023

Filed:

Sep 22, 2022

Appl. No.:

17/950341

Inventors:

- Blacksburg VA, US
Scott HARPER - Blacksburg VA, US
Jonathan GRAF - Blacksburg VA, US
Carlton FRALEY - Christiansburg VA, US
Alan COOK - Christiansburg VA, US
Timothy DUNHAM - Roanoke VA, US

International Classification:

H04L 9/00
G06F 30/31
H04L 9/32

Abstract:

A computer system traces an original electronic design automation (EDA) implementation process for electronic hardware designs. The original EDA implementation process includes multiple subprocesses to convert a hardware model to a physically-realized electronic circuit. The system inputs a cryptographic key and design information that includes the hardware model, constraints, properties, implementation settings, and other directives for directing the conversion. The cryptographic key and design information are processed to generate a sequence of instructions to execute and provide traceability of each subprocess. For each subprocess, the system gathers intermediate design state and implementation settings resulting from or influencing execution of the subprocess; combines the intermediate design state and implementation settings into a data string and determines a cryptographic hash value for the data string; digitally signs the cryptographic hash value using a digital signature certificate derived from the cryptographic key to generate a signed hash; stores the signed hash and identifiers associated with data files used for determining the cryptographic hash value to an electronic ledger to generate an updated electronic ledger; authenticates the signed hash from the electronic ledger to generate an authenticated signed hash; reconstructs a hash from the data files stored in the electronic ledger to generate a reconstructed hash; compares the authenticated signed hash with the reconstructed hash, and in response to a mismatch, generates an error signal. The steps are repeated for each subsequent subprocess, and the traced EDA implementation process results are stored in memory.