Alberto K Gonzalez

US Patent:

20140292377, Oct 2, 2014

Filed:

Mar 28, 2013

Appl. No.:

13/852783

Inventors:

- Irvine CA, US
Alberto GONZALEZ - Chandler AZ, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

G05F 3/16

US Classification:

327108, 327306

Abstract:

An inverter circuit includes an input stage and an output stage, each including pairs of complementary transistors having low-voltage oxides. The transistors within the input stage are configured to receive the input signal and to provide control voltages in response to input signal voltage variations. The voltage level of one control voltage is clamped between an intermediate voltage and a high voltage, and the voltage level of the other control voltage is clamped between the intermediate voltage and a low voltage. The switching states of each complementary transistor in the output stage arc controlled by the control voltages, which results in an output signal voltage varying between the high and the low voltage. The voltage clamping advantageously allows the inverter circuit to switch between the high and the low voltage level without exceeding a maximum gate-source or a gate-drain voltage rating for any transistor, and without requiring additional passive components.