Shimon B. Scherzer - Sunnyvale CA Piu Bill Wong - Monte Sereno CA Jiangfeng Wu - Campbell CA Alexander V. Tesler - Palo Alto CA
Assignee:
Kathrein-Werke KG - Rosenheim
International Classification:
H04B 138
US Classification:
4555621, 455 6711, 455446
Abstract:
The invention provides optimization of communication links by using a control loop with a relatively long time constant and adjusting particular communication links based upon feedback from a virtual communication unit associated with a communication link. A preferred embodiment of the invention optimizes wireless links in a point to multipoint system, such as a cellular communication system, by dividing a service area into segments and adjusting an antenna beam associated with a segment when a mobile unit is operable therein. This preferred embodiment results in convergence upon an optimized communication link over time and is suitable for use even with highly mobile systems. Preferred embodiments of the invention provide control loops for location or segment optimization as well as for individual optimization.
System And Method For Providing Phase Matching With Optimized Beam Widths
Piu Bill Wong - Monte Sereno CA, US Alexander V. Tesler - Palo Alto CA, US Shimon B. Scherzer - Sunnyvale CA, US
Assignee:
Kathrein-Werke KG - Rosenheim
International Classification:
H04Q 700
US Classification:
4555621, 4554521
Abstract:
Systems and methods providing analysis of channel characteristics for determining a optimum beam configuration for use therein are shown. Preferably, the direction and angle spread for subscriber units are determined in order to provide a beam for use therewith. According to a preferred embodiment, forward link characteristics are emulated in the reverse link in order to identify an optimum beam configuration. This optimum beam configuration is then preferably adapted for use in the forward link. Preferably, the present invention operates to recognize subscriber units which are spatially separated such that the optimized beams may be utilized in providing simultaneous communications therewith.
Circuits And Methods For Calibrating A Delay Element
Avago Technologies Fiber IP (Singapore) Pte. Ltd. - Singapore
International Classification:
G01R 29/02 G01R 19/00
US Classification:
702 79, 702 64, 702 65, 702 72
Abstract:
A controllable delay element is coupled in parallel with a calibration circuit. The calibration circuit receives a periodic reference signal and generates a series of sample voltages responsive to a time-varying analog voltage, the periodic reference signal, and the delayed periodic signal at the output of the controllable delay element. The calibration circuit distributes the series of sampled voltages for determining the components of a first vector. The first vector components are used to calculate the phase that results from a control signal applied to the controllable delay element. After the control signal is modified, a second vector is used to calculate the phase that results from the control signal. The delay can be determined by the product of the period of the reference signal and the difference in phase.
Systems And Methods For Determining An Ac/Dc Cross-Calibration Coefficient
Avago Technologies Fiber IP (Singapore) Pte. Ltd. - Singapore
International Classification:
H04B 10/08
US Classification:
398 25, 398 16, 398 38
Abstract:
A first signal shaper generates a first signal having a first asymmetry. A second signal shaper generates a second signal having a second asymmetry different from the first asymmetry. The first and second signals have approximately the same peak-to-peak amplitude. An AC measurement element acquires a first scaled representation of the shape of the first signal and a second scaled representation of the shape of the second signal. A DC measurement element receives the first signal and the second signal and generates a first value responsive to the first signal and a second value responsive to the second signal. A processor calculates a first factor responsive to the shape of the first signal and a second factor responsive to the shape of the second signal. The processor applies the first and second factors and the first and second values in a function that generates the AC/DC cross-calibration coefficient.
Alexander Tesler - Palo Alto CA, US Dmitri Varsanofiev - San Diego CA, US
International Classification:
G11B005/127
US Classification:
360/324000, 360/324200
Abstract:
A small-size magnetoresistive device which allows measurement of spatial distribution of magnetic field along one axis with high resolution is disclosed. The magnetoresistive device includes: a magnetoresistive stripe oriented along the measurement axis; a plurality of conductive layers comprising electrodes distributed along the length of the stripe, separated by insulating layers. The measurement of the spatial distribution of the magnetic field is performed by analyzing signal levels between electrodes.
Dmitri Varsanofiev - San Diego CA, US Alexander Tesler - Palo Alto CA, US Alexander Pevzner - Moscow, RU
International Classification:
H04N 7/167
US Classification:
380201
Abstract:
The invention describes a method of efficient way of video delivery in the legacy (non-802.11e) infrastructure networks and a device (Transmitter) based on this method. The invention permits the video stream to bypass the access point and therefore increases the available bandwidth by a factor of two or more and permits increasing the throughput by improving only the radio and antenna on the Transmitter (as opposed to improvements on both the Transmitter and AP necessary without the invention).
Servo Track Writing Measurement Of Gapped Initial Clock Track To Write Full Clock Track
Anatoly Stein - Los Altos CA Alexander Tesler - Palo Alto CA Dimitry Varsanofiev - Palo Alto CA
Assignee:
Guzik Technical Enterprises, Inc. - San Jose CA
International Classification:
G11B 2014 G11B 5012
US Classification:
360 75
Abstract:
An apparatus for servo track writing on a magnetic medium comprises a clock head (12) and a regular head (14). The regular head (14) writes an initial approximation of the clock track so as to leave a small gap between the last written pulse of the clock track and the first pulse of the clock track. Then this gap is measured by gap measurement system (33) and the frequency of clock track is updated using a direct digital synthesis system (35) so as to fill a full clock track during the next writing. The initial clock track is read by regular head (14) and its output signal is supplied to a phase locked loop. The output of the phase locked loop drives a direct digital synthesis system (35), which generates a modified frequency on its output. A signal of this frequency, in turn, is supplied to the clock head (12), which writes a new improved clock track on the disk. The resulting clock track closure is determined by instability of disk rotational speed at the gap interval and can be made less than 1 ns after five disk revolutions.