Anand Ganesh Dabak

Address:

8625 Kendall Dr, Plano, TX 75025

VIN:

5FNRL38627B433811

Make:

HONDA

Model:

ODYSSEY

Year:

2007

US Patent:

6345069, Feb 5, 2002

Filed:

Dec 21, 1998

Appl. No.:

09/217759

Inventors:

Anand G. Dabak - Richardson TX
Srinath Hosur - Dallas TX
Sundararajan Sriram - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

A61F 206

US Classification:

375152, 375340

Abstract:

A circuit for detecting a signal is designed with a first serial circuit coupled to receive an input signal in response to a clock signal. The first serial circuit ( ) has N taps ( ) arranged to produce a respective plurality of first tap signals from the input signal ( ). A first logic circuit ( ) is coupled to receive the plurality of first tap signals and one of N predetermined signals and the complement of N predetermined signals. The first logic circuit produces a first output signal ( ) in response to the clock signal, the plurality of first tap signals and the one of N predetermined signals and the complement of N predetermined signals. A second serial circuit coupled to receive the first output signal. The second serial circuit has M taps ( ) arranged to produce a respective plurality of second tap signals from the first output signal, wherein a ratio of N/M is no greater than four. A second logic circuit ( ) is coupled to receive one of a true and a complement of each of the plurality of second tap signals.

US Patent:

6356605, Mar 12, 2002

Filed:

Nov 19, 1998

Appl. No.:

09/195942

Inventors:

Srinath Hosur - Dallas TX
Anand G. Dabak - Richardson TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H04B 710

US Classification:

375347, 375343

Abstract:

A circuit is designed with a correction circuit ( ) coupled to receive a first estimate signal ( ), a second estimate signal ( ), and a plurality of input signals from an external source along plural signal paths. The plurality of input signals includes a first and a second input signal (R , R ) The correction circuit produces a first symbol estimate in response to the first and second estimate signals and the first and second input signals. The correction circuit produces a second symbol estimate in response to the first and second estimate signals and the first and second input signals. A combining circuit is coupled to receive a plurality of first symbol estimates including the first symbol estimate and a plurality of second symbol estimates including the second symbol estimate. The combining circuit produces a first symbol signal ({tilde over (S)} ) in response to the plurality of first symbol estimates and a second symbol signal ({tilde over (S)} ) in response to the plurality of second symbol estimates. A synchronization circuit ( ) is coupled to receive the first and second symbol signals ( ) and a first known symbol and a second known symbol ( ).

US Patent:

6366574, Apr 2, 2002

Filed:

May 28, 1998

Appl. No.:

09/086689

Inventors:

Eric Baissus - Plascassier, FR
Srinath Hosur - Plano TX
Anand G. Dabak - Richardson TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H04J 306

US Classification:

370350, 370514, 370516, 375327

Abstract:

Device for recovering synchronization on a signal transmitted to a mobile-telephone receiver, including phase-estimator means ( ) for the absolute value (ABS) and the sign (SIGN) of the transmitted signal, estimation processor ( ) for processing the output signals of the estimators ( ), a sequencer ( ), one input of which is connected to the output of the processor ( ) and one output of which applies a mode signal to the processor, another output of the sequencer ( ) being connected via a sampling-time generator ( ) to the sampling-time control inputs of the estimators ( ).

US Patent:

6396457, May 28, 2002

Filed:

Nov 30, 2000

Appl. No.:

09/727863

Inventors:

Alan Gatherer - Richardson TX
Mohammed Nafie - Richardson TX
Anand G. Dabak - Plano TX
Carl M. Panasik - Garland TX
Michael L. McMahan - Plano TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01Q 2100

US Classification:

343853, 343824, 343893

Abstract:

A concentrator ( ) coupled to a wired network ( ) also acts as a master device relative to each of a plurality of ad hoc wireless communication networks ( ), thereby permitting wireless communication devices in the ad hoc networks to access the wired network. The concentrator utilizes antenna array processing and beamforming techniques when communicating with the devices of the various networks, in order to advantageously reduce communication interference between the networks.

US Patent:

6404826, Jun 11, 2002

Filed:

Dec 22, 1998

Appl. No.:

09/218939

Inventors:

Timothy M. Schmidl - Dallas TX
Anand G. Dabak - Richardson TX
Srinath Hosur - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H04L 2706

US Classification:

375340, 375224, 375227, 375316, 375147, 370342, 4552262, 455522

Abstract:

A circuit is designed with an estimate circuit ( ) coupled to receive a plurality of predetermined signals ( ) from an external source. Each of the predetermined signals is spaced apart in time. The estimate cit produces a first estimate signal in response to at least one of the plurality of predetermined signals. An averaging circuit is coupled to receive a data signal and at least one of the plurality of predetermined signals. The averaging circuit produces an average signal from the data signal and at least one of the plurality of predetermined signals.

US Patent:

6424642, Jul 23, 2002

Filed:

Dec 31, 1998

Appl. No.:

09/224632

Inventors:

Timothy M. Schmidl - Dallas TX
Anand G. Dabak - Richardson TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H04B 7216

US Classification:

370342, 370335, 370491

Abstract:

A circuit coupled to receive a sequence of signals is designed with a multiplication circuit ( ) coupled to receive a first signal, a second signal and a complex conjugate of the first signal. The second signal follows the first signal in time. The multiplication circuit produces a first product sequence of the first signal and the complex conjugate and a second product sequence of the second signal and the complex conjugate. A summation circuit ( ) is coupled to receive the first product sequence and the second product sequence. The summation circuit produces a first sum of the first product sequence and a second sum of the second product sequence.

US Patent:

6424679, Jul 23, 2002

Filed:

Aug 28, 2001

Appl. No.:

09/941286

Inventors:

Anand G. Dabak - Richardson TX
Rohit Negi - Stanford CA

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H04B 702

US Classification:

375267, 455101

Abstract:

A mobile communication system is designed with an input circuit coupled to receive a first plurality of signals (r (i+ ), i=0-N-1) during a first time (T0-T1) from an external source and coupled to receive a second plurality of signals (r (i+ ), i=N-2N-1) during a second time (T1-T2) from the external source. The input circuit receives each of the first and second plurality of signals along respective first and second paths (j). The input circuit produces a first input signal (R ) and a second input signal (R ) from the respective first and second plurality of signals. A correction circuit is coupled to receive a first estimate signal ( ), a second estimate signal ( ) and the first and second input signals. The correction circuit produces a first symbol estimate (S ) in response to the first and second estimate signals and the first and second input signals. The correction circuit produces a second symbol estimate ({right arrow over (S)} ) in response to the first and second estimate signals and the first and second input signals.

US Patent:

6449314, Sep 10, 2002

Filed:

Aug 28, 2001

Appl. No.:

09/941285

Inventors:

Anand G. Dabak - Richardson TX
Rohit Negi - Stanford CA

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H04B 702

US Classification:

375267

Abstract:

A mobile communication system is designed with an input circuit coupled to receive a first plurality of signals (r (i+ ), i=0-N-1) during a first time (T -T ) from an external source and coupled to receive a second plurality of signals (r (i+ ), i=N-2N-1) during a second time (T -T ) from the external source. The input circuit receives each of the first and second plurality of signals along respective first and second paths (j). The input circuit produces a first input signal (R ) and a second input signal (R ) from the respective first and second plurality of signals. A correction circuit is coupled to receive a first estimate signal ( ), a second estimate signal ( ) and the first and second input signals. The correction circuit produces a first symbol estimate ({tilde over (S)} ) in response to the first and second estimate signals and the first and second input signals. The correction circuit produces a second symbol estimate ({tilde over (S)} ) in response to the first and second estimate signals and the first and second input signals.