Ann C Westerheim

US Patent:

57888698, Aug 4, 1998

Filed:

Nov 2, 1995

Appl. No.:

8/552322

Inventors:

Timothy J. Dalton - North Reading MA
Ann C. Westerheim - Westford MA
Jamshed Hoshang Dubash - Marlboro MA
Marion Garver - Marlboro MA
Richard A. Bickford - Boylston MA

Assignee:

Digital Equipment Corporation - Maynard MA

International Classification:

H01L 2166

US Classification:

216 60

Abstract:

A method of etching a dielectric layer to form a via to an underlying conductive layer is described. The method includes etching selected portions of the dielectric using a plasma containing an etchant and monitoring electromagnetic energy of plasma emission radiation from the species to determine a ratio of a pair of the species in the plasma that is used to indicate the onset of an etch stop phenomenon. Etching of the dielectric continues and additional dielectrics are processed through the plasma etching step while the ratio of species is less than a predetermined threshold value. The process is stopped and a plasma reactor is cleaned once the ratio of the etchants exceeds the threshold value. The method can be used to form vias between a pair of conductive layers. In a preferred approach to form areas for area or bond pads of an integrated circuit during the step of etching the dielectric, the dielectric is masked by a pattern which provides a plurality of vias dispersed within the pad area to be etched forming a sea of contacts or disposed about the periphery of the pad area to be etched forming a ring of contacts contact.

US Patent:

60966378, Aug 1, 2000

Filed:

Jul 28, 1998

Appl. No.:

9/124198

Inventors:

Tirunelveli S. Sriram - Maynard MA
Ann C. Westerheim - Westford MA
John J. Maziarz - Sutton MA
Vladimir Bolkhovsky - Framingham MA

Assignee:

Compaq Computer Corporation - Houston TX

International Classification:

H01L 214763

US Classification:

438643

Abstract:

A method is described for forming an electromigration-resistant (ER) intermetallic region beneath and adjacent a conductive plug in a via. Preferably the ER region is formed of a sintered intermetallic compound of Al and Ti, and the conductive plug is formed of W.