Ashish Arvind Bhargave

US Patent:

8077810, Dec 13, 2011

Filed:

Nov 18, 2008

Appl. No.:

12/273107

Inventors:

Christopher J. Hansen - Sunnyvale CA, US
Jason A. Trachewsky - Menlo Park CA, US
Ashish Bhargave - Irvine CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H03D 1/00
H04L 27/06

US Classification:

375341, 375262

Abstract:

An apparatus for high data throughput reception in a WLAN includes a receiving module, first and second determining modules, a generating module, and a producing module. The receiving module receives a symbol vector representing M streams of symbols transmitted via a wireless communication channel. The first determining module determines inner coded bits and extrinsic information of the inner coded bits based on the symbol vector, a channel matrix, and inner extrinsic information feedback. The second determining module determines outer coded bits and extrinsic information of the outer coded bits based on the extrinsic information of the inner coded bits, the inner coded bits, and a soft input soft output decoding process. The generating module generates the inner extrinsic information feedback based on the extrinsic information of the outer coded bits. The producing module produces decoded bits based on the outer coded bits.

US Patent:

20050185739, Aug 25, 2005

Filed:

Jun 24, 2004

Appl. No.:

10/876230

Inventors:

Christopher Hansen - Sunnyvale CA, US
Jason Trachewsky - Menlo Park CA, US
Ashish Bhargave - Irvine CA, US

International Classification:

H04B001/38

US Classification:

375340000

Abstract:

An iterative decoder for use in a WLAN includes an inner decoder/detector, a first subtraction module, a deinterleaving module, an outer decoder, a second subtraction module, an interleaving module, and a determining module. The inner decoder/detector determines inner coded bits and extrinsic information of the inner coded bits from symbol vector based on a channel matrix and inner extrinsic information feedback. The first subtraction module subtracts the inner extrinsic information feedback from the extrinsic information of the inner coded bits. The deinterleaving module deinterleaves the output of the first subtraction module to produce deinterleaved inner extrinsic information. The outer decoder determines outer coded bits and extrinsic information of the outer coded bits from the deinterleaved inner extrinsic information. The second subtraction module subtracts the deinterleaved inner extrinsic information from the extrinsic information of the outer coded bits. The interleaving module interleaves the output of the second subtraction module to produce the inner extrinsic information feedback. The determining module produces decoded bits based on the outer coded bits.

Address:

13922 Tustin East Dr APT 67, Tustin, CA 92780

VIN:

1HGFA16847L095859

Make:

HONDA

Model:

CIVIC

Year:

2007