Bing Gad Wang

US Patent:

7715587, May 11, 2010

Filed:

Oct 28, 2005

Appl. No.:

11/260906

Inventors:

Victor Kai-Chieh Liang - Irvine CA, US
Yi Li - Foothill Ranch CA, US
Bing Wang - Aliso Viejo CA, US
Maurice Chow - Irvine CA, US
Hoai Le - Huntington Beach CA, US
Richard Thai - Fountain Valley CA, US

International Classification:

G06K 9/00
H04N 7/167

US Classification:

382100, 380200

Abstract:

A correlation-based system for watermarking continuous digital media at the system application level. It is a post-compression process for watermarking where no a priori knowledge of the underlying compression algorithm is required. Per each compressed media frame, a current unique digital signature is generated based on the data from the current compressed frame plus the digital signature that has been previously generated. The signature thus generated is then used in conjunction with the next compressed frame to generate the next unique digital signature. All digital signatures are correlated according to the above process until a “reset” signal is issued. A new chain of correlated digital signatures is produced by the system with a pre-determined initial signature.

US Patent:

7715588, May 11, 2010

Filed:

Oct 28, 2005

Appl. No.:

11/262006

Inventors:

Bing Wang - Aliso Viejo CA, US
Hoai Le - Huntington Beach CA, US
Yi Li - Foothill Ranch CA, US
Victor Kai-Chieh Liang - Irvine CA, US
Maurice Chow - Irvine CA, US
Richard Thai - Fountain Valley CA, US

International Classification:

G06K 9/00
H04N 7/167

US Classification:

382100, 382278, 380200

Abstract:

A two level cross-correlation based system for watermarking continuous digital media at the system application level. It is a post-compression process for watermarking where no a priori knowledge of the underlying compression algorithm is required. Per each compressed media frame, a current unique digital signature is generated based on the data from the current compressed frame plus the digital signature that has been previously generated. The signature thus generated is then used in conjunction with the next compressed frame to generate the next unique digital signature. All digital signatures are correlated according to the above process until a “reset” signal is issued. A new chain of correlated digital signatures is produced by the system with a pre-determined initial signature.

US Patent:

8175328, May 8, 2012

Filed:

May 7, 2010

Appl. No.:

12/775886

Inventors:

Bing Wang - Aliso Viejo CA, US
Hoai Le - Huntington Beach CA, US
Yi Li - Foothill Ranch CA, US
Victor Kai-Chieh Liang - Irvine CA, US
Maurice Chow - Irvine CA, US
Richard Thai - Fountain Valley CA, US

International Classification:

G06K 9/00
H04N 7/167

US Classification:

382100, 382278, 380200

Abstract:

A two level cross-correlation based system for watermarking continuous digital media at the system application level. It is a post-compression process for watermarking where no a priori knowledge of the underlying compression algorithm is required. Per each compressed media frame, a current unique digital signature is generated based on the data from the current compressed frame plus the digital signature that has been previously generated. The signature thus generated is then used in conjunction with the next compressed frame to generate the next unique digital signature. All digital signatures are correlated according to the above process until a “reset” signal is issued. A new chain of correlated digital signatures is produced by the system with a pre-determined initial signature.

US Patent:

8339886, Dec 25, 2012

Filed:

Feb 14, 2011

Appl. No.:

13/026565

Inventors:

Bing Wang - Palo Alto CA, US

Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd.

International Classification:

G11C 7/00

US Classification:

365205, 365206, 365207, 3652101, 36521015

Abstract:

A circuit comprises a first read bit line, a second read bit line, and a sense amplifier. First and second read bit lines couple a plurality of memory cells and a reference cell of a memory array, respectively. The sense amplifier is configured to receive the first read bit line as a first input and the second read bit line as a second input. When a memory cell of the first plurality of memory cells is read, the memory cell is read activated, the first reference cell is configured to be off, the second reference cell is configured to be on, and the sense amplifier is configured to provide an output reflecting a data logic stored in the memory cell based on a voltage difference between a first voltage of the first read bit line and a second voltage of the second read bit line.

US Patent:

8467567, Jun 18, 2013

Filed:

May 7, 2010

Appl. No.:

12/775845

Inventors:

Victor Kai-Chieh Liang - Irvine CA, US
Yi Li - Foothill Ranch CA, US
Bing Wang - Aliso Viejo CA, US
Maurice Chow - Irvine CA, US
Hoai Le - Huntington Beach CA, US
Richard Thai - Fountain Valley CA, US

International Classification:

G06K 9/00
H04N 7/167

US Classification:

382100, 380200

Abstract:

A correlation-based system for watermarking continuous digital media at the system application level. It is a post-compression process for watermarking where no a priori knowledge of the underlying compression algorithm is required. Per each compressed media frame, a current unique digital signature is generated based on the data from the current compressed frame plus the digital signature that has been previously generated. The signature thus generated is then used in conjunction with the next compressed frame to generate the next unique digital signature. All digital signatures are correlated according to the above process until a “reset” signal is issued. A new chain of correlated digital signatures is produced by the system with a pre-determined initial signature.

US Patent:

8605523, Dec 10, 2013

Filed:

Feb 17, 2012

Appl. No.:

13/399877

Inventors:

Derek C. Tao - Fremont CA, US
Young Seog Kim - Pleasanton CA, US
Kuoyuan (Peter) Hsu - San Jose CA, US
Bing Wang - Palo Alto CA, US

Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd.

International Classification:

G11C 7/00

US Classification:

365194, 365149

Abstract:

A time delay is determined to cover a timing of a memory cell in a memory macro having a tracking circuit. Based on the time delay, a capacitance corresponding to the time delay is determined. A capacitor having the determined capacitance is utilized. The capacitor is coupled to a first data line of a tracking cell of the tracking circuit. A first transition of the first data line causes a first transition of a second data line of the memory cell.

US Patent:

8619477, Dec 31, 2013

Filed:

Jul 20, 2010

Appl. No.:

12/839624

Inventors:

Bing Wang - Palo Alto CA, US
Kuoyuan (Peter) Hsu - San Jose CA, US
Derek C. Tao - Fremont CA, US

Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd.

International Classification:

G11C 7/10

US Classification:

36518904, 365154, 365203

Abstract:

A Static Random Access Memory (SRAM) includes at least two memory cells sharing a read bit line (RBL) and a write bit line (WBL). Each memory cell is coupled to a respective read word line (RWL) and a respective write word line (WWL). A write tracking control circuit is coupled to the memory cells for determining a write time of the memory cells. The write tracking control circuit is capable of receiving an input voltage and providing an output voltage. The respective RWL and the respective WWL of each memory cell are asserted during a write tracking operation.

US Patent:

8619478, Dec 31, 2013

Filed:

Oct 5, 2011

Appl. No.:

13/253822

Inventors:

Derek C. Tao - Fremont CA, US
Bing Wang - Palo Alto CA, US

Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd.

International Classification:

G11C 7/10

US Classification:

36518905, 365194, 36523311, 365189011, 365191, 3652331, 36523312

Abstract:

A first clock is received by a memory macro. In response to a first clock transition of the first clock, a first transition of a second clock and of a third clock is generated. A tracking transition of a tracking signal is caused by the second clock. Based on a later transition of a second clock transition of the first clock and the tracking transition of the tracking signal, a second transition of the third clock is generated. The third clock is for use by an input-output of the memory macro.