Brian Kyle Barnes

US Patent:

6889308, May 3, 2005

Filed:

Jan 18, 2002

Appl. No.:

10/051448

Inventors:

Rodney W. Schmidt - Dripping Springs TX, US
Brian C. Barnes - Round Rock TX, US
Geoffrey S. Strongin - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Austin TX

International Classification:

G06F012/00

US Classification:

711203, 711206, 711209

Abstract:

In one aspect of the present invention, an apparatus for converting a virtual address to a physical address is provided. The apparatus comprises a comparator, a first mechanism, and a second mechanism. The comparator is adapted to receive the virtual address and deliver a first signal indicating that the virtual address is outside a first preselected range, and a second signal indicating that the virtual address is within the first preselected range. The first mechanism is adapted to generate a first physical address from the virtual address in response to receiving the first signal, and the second mechanism is adapted to generate a second physical address from the virtual address in response to receiving the second signal.

US Patent:

7451324, Nov 11, 2008

Filed:

May 31, 2002

Appl. No.:

10/161500

Inventors:

Rodney W. Schmidt - Dripping Springs TX, US
Brian C. Barnes - Round Rock TX, US
Geoffrey S. Strongin - Austin TX, US
David S. Christie - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Austin TX

International Classification:

G06F 21/22

US Classification:

713187, 713189

Abstract:

A method and system for handling a security exception. The method includes creating a security exception stack frame in secure memory at a base address. The method also includes writing a faulting code sequence address and one or more register values into the security exception stack frame, and executing a plurality of security exception instructions.

US Patent:

7493498, Feb 17, 2009

Filed:

Mar 27, 2002

Appl. No.:

10/107784

Inventors:

Rodney W. Schmidt - Dripping Springs TX, US
Brian C. Barnes - Round Rock TX, US
Geoffrey S. Strongin - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Austin TX

International Classification:

G06F 12/14

US Classification:

713193

Abstract:

A method and apparatus for selectively executing an I/O instruction. The method includes creating an I/O permission bitmap in a memory and receiving an I/O port number and a security context identification (SCID) value. The method also includes using the SCID value and the I/O port number to access the I/O permission bitmap stored to obtain a permission bit corresponding to the I/O port and executing the I/O instruction dependent upon a value of the permission bit corresponding to the I/O port. The I/O permission bitmap includes a plurality of permission bits. Each of the permission bits corresponds to a different one of a plurality of I/O ports. Each of the permission bits has a value indicating whether access to the corresponding I/O port is allowed. The I/O port number indicates the I/O port referenced by the I/O instruction. The SCID value indicates a security context level of a memory location including the I/O instruction.

US Patent:

20030226014, Dec 4, 2003

Filed:

May 31, 2002

Appl. No.:

10/160984

Inventors:

Rodney Schmidt - Dripping Springs TX, US
Brian Barnes - Round Rock TX, US
Geoffrey Strongin - Austin TX, US
David Christie - Austin TX, US

International Classification:

H04L009/00

US Classification:

713/164000

Abstract:

A method and system for performing the method. a method is provided. The method includes executing an insecure routine and receiving a request from the insecure routine. The method also includes performing a first evaluation of the request in hardware, and performing a second evaluation of the request in a secure routine in software. The computer system includes a processor configurable to execute a secure routine and an insecure routine. The computer system also includes hardware coupled to perform a first evaluation of a request associated with the insecure routine. The hardware is further configured to provide a notification of the request to the secure routine. The secure routine is configured to perform a second evaluation of the request. The secure routine is further configured to deny a requested response to the request.