Brian Keith Cabral

US Patent:

6697062, Feb 24, 2004

Filed:

Aug 6, 1999

Appl. No.:

09/369359

Inventors:

Brian Keith Cabral - San Jose CA
Marc Olano - San Fransico CA
Philip Nemec - Mountain View CA

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06T 1700

US Classification:

345419, 345420, 345426, 345427, 345582, 345581, 345424, 345646, 345645

Abstract:

The present invention provides a method, system, and computer program product for reflection space image based rendering of an object at an interactive frame rate. A set of source radiance environment maps associated with a set of source viewing vectors are warped to create a destination radiance environment map associated with a destination viewing vector in a current frame. Blending and weighting operations can also be applied in creating the final destination radiance environment map. An object is then rendered with texture environment mapped from the destination radiance environment map.

US Patent:

7123259, Oct 17, 2006

Filed:

Oct 27, 2003

Appl. No.:

10/694470

Inventors:

Brian Keith Cabral - San Jose CA, US
Marc Olano - San Francisco CA, US
Philip Nemec - Mountain View CA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G09G 5/00
G06T 15/50
G06T 15/60
G06K 9/64

US Classification:

345426, 345581, 382279

Abstract:

The present invention provides a method, system, and computer program product for reflection space image based rendering of an object at an interactive frame rate. A set of source radiance environment maps associated with a set of source viewing vectors are warped to create a destination radiance environment map associated with a destination viewing vector in a current frame. Blending and weighting operations can also be applied in creating the final destination radiance environment map. An object is then rendered with texture environment mapped from the destination radiance environment map.

US Patent:

7296007, Nov 13, 2007

Filed:

Jul 6, 2004

Appl. No.:

10/885495

Inventors:

John Funge - Sunnyvale CA, US
Ron Musick - Belmont CA, US
Daniel Dobson - Atherton CA, US
Nigel Duffy - San Francisco CA, US
Michael McNally - Cupertino CA, US
Xiaoyuan Tu - Sunnyvale CA, US
Ian Wright - Mountain View CA, US
Wei Yen - Los Altos Hills CA, US
Brian Cabral - San Jose CA, US

Assignee:

AiLive, Inc. - Mountain View CA

International Classification:

G06F 17/00
G06N 5/00

US Classification:

706 47, 434350, 345156, 706 45

Abstract:

Providing dynamic learning for software agents in a simulation. Software agents with learners are capable of learning from examples. When a non-player character queries the learner, it can provide a next action similar to the player character. The game designer provides program code, from which compile-time steps determine a set of raw features. The code might identify a function (like computing distances). At compile-time steps, determining these raw features in response to a scripting language, so the designer can specify which code should be referenced. A set of derived features, responsive to the raw features, might be relatively simple, more complex, or determined in response to a learner. The set of such raw and derived features form a context for a learner. Learners might be responsive to (more basic) learners, to results of state machines, to calculated derived features, or to raw features.

US Patent:

7324106, Jan 29, 2008

Filed:

Jul 27, 2004

Appl. No.:

10/899603

Inventors:

Brian Cabral - San Jose CA, US
Amy J. Midgal - Cupertino CA, US
Rui M. Bastos - Porto Alegre, BR
Karim M. Adballa - Menlo Park CA, US

Assignee:

NVIDIA Corporation - Santa Clara CA

International Classification:

G06T 15/50
G06T 15/60
G06F 12/02
G06F 9/44
G06F 9/46

US Classification:

345426, 345543, 345559, 719328

Abstract:

An apparatus and method for translating fixed function state into a shader program. Fixed function state is received and stored and when a new shader program is detected the fixed function state is translated into shader program instructions. Registers specified by the program instructions are allocated for processing in the shader program. The registers may be remapped for more efficient use of the register storage space.

US Patent:

7385607, Jun 10, 2008

Filed:

Sep 10, 2004

Appl. No.:

10/938042

Inventors:

Rui M. Bastos - Porto Alegre, BR
Karim M. Abdalla - Menlo Park CA, US
Christian Rouet - San Rafael CA, US
Michael J. M. Toksvig - Palo Alto CA, US
Johnny S. Rhoades - Durham NC, US
Roger L. Allen - San Jose CA, US
Emmett M. Kilgariff - San Jose CA, US
Gary M. Tarolli - Concord MA, US
Brian Cabral - San Jose CA, US
Craig Michael Wittenbrink - Palo Alto CA, US
Sean J. Treichler - Mountain View CA, US

Assignee:

NVIDIA Corporation - Santa Clara CA

International Classification:

G06F 15/16
G06F 15/80
G06T 1/20

US Classification:

345502, 345505, 345506

Abstract:

A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks. Each shader pipeline has a shader gatekeeper that interacts with the shader distributor and with the shader instruction processor such that pixel data that passes through the shader pipelines is controlled and processed as required.

US Patent:

7408553, Aug 5, 2008

Filed:

Dec 15, 2005

Appl. No.:

11/305483

Inventors:

Michael J. M. Toksvig - Palo Alto CA, US
Edward A. Hutchins - Mountain View CA, US
Brian Cabral - San Jose CA, US

Assignee:

NVIDIA Corporation - Santa Clara CA

International Classification:

G06T 11/40

US Classification:

345441, 345423

Abstract:

Systems and methods for identifying pixels that are inside a two-dimensional path may be used to fill the path. The path is segmented and a point in space is identified that is used to generate a triangle fan, where each triangle in the fan is formed by one of the segments of the path and the point. Locations in a winding buffer are updated for each pixel that is within a triangle of the triangle fan. The resulting winding buffer indicates the pixels that are inside the two-dimensional path. The winding buffer may be used to fill the path.

US Patent:

7558698, Jul 7, 2009

Filed:

Aug 3, 2007

Appl. No.:

11/890262

Inventors:

John Funge - Sunnyvale CA, US
Ron Musick - Belmont CA, US
Daniel Dobson - Atherton CA, US
Nigel Duffy - San Francisco CA, US
Michael McNally - San Jose CA, US
Xiaoyuan Tu - Sunnyvale CA, US
Ian Wright - Mountain View CA, US
Wei Yen - Los Altos Hills CA, US
Brian Cabral - San Jose CA, US

Assignee:

AiLive, Inc. - Mountain View CA

International Classification:

G06G 7/00

US Classification:

702179, 706 12, 706 20, 706 46, 706 50, 707100, 707102

Abstract:

A system including at least specialized elements that are restricted to a particular domain of data analysis or processing and configurable data that permits the specialized elements to be tailored to a particular application. The configurable data expands applicability of the specialized elements to plural applications within the particular domain. The specialized elements can be provided by a supplier to a developer without the supplier having detailed knowledge of structures and internal operations used by the particular application. The particular application can be generated by the developer without the developer having detailed knowledge of internal operations used by the specialized elements.

US Patent:

7600155, Oct 6, 2009

Filed:

Dec 13, 2005

Appl. No.:

11/302950

Inventors:

John R. Nickolls - Los Altos CA, US
Roger L. Allen - Lake Oswego OR, US
Brian K. Cabral - San Jose CA, US
Brett W. Coon - San Jose CA, US
Robert C. Keller - Palo Alto CA, US

Assignee:

NVIDIA Corporation - Santa Clara CA

International Classification:

G06F 11/00

US Classification:

714 38

Abstract:

A system has a graphics processing unit with a processor to monitor selected criteria and circuitry to initiate the storage of execution state information when the selected criteria reaches a specified state. A memory stores execution state information. A central processing unit executes a debugging program to analyze the execution state information.