Brian E Erickson

US Patent:

20130096643, Apr 18, 2013

Filed:

Dec 4, 2012

Appl. No.:

13/705021

Inventors:

Nevro Corporation - Menlo Park CA, US
Anthony V. Caparso - San Jose CA, US
Brian J. Erickson - Woodbury MN, US
Konstantinos Alataris - Belmont CA, US
Andre B. Walker - Monte Sereno CA, US

Assignee:

Nevro Corporation - Menlo Park CA

International Classification:

A61N 1/36

US Classification:

607 46

Abstract:

Multi-frequency neural treatments and associated systems and methods are disclosed. A method in accordance with a particular embodiment includes at least reducing patient pain by applying a first electrical signal to a first target location of the patient's spinal cord region at a frequency in a first frequency range of up to about 1,500 Hz, and applying a second electrical signal to a second target location of the patient's spinal cord region at a frequency in a second frequency range of from about 2,500 Hz to about 100,000 Hz.

US Patent:

20130096644, Apr 18, 2013

Filed:

Dec 4, 2012

Appl. No.:

13/705045

Inventors:

Nevro Corporation - Menlo Park CA, US
Anthony V. Caparso - San Jose CA, US
Brian J. Erickson - Woodbury MN, US
Konstantinos Alataris - Belmont CA, US
Andre B. Walker - Monte Sereno CA, US

Assignee:

Nevro Corporation - Menlo Park CA

International Classification:

A61N 1/36

US Classification:

607 46

Abstract:

Multi-frequency neural treatments and associated systems and methods are disclosed. A method in accordance with a particular embodiment includes at least reducing patient pain by applying a first electrical signal to a first target location of the patient's spinal cord region at a frequency in a first frequency range of up to about 1,500 Hz, and applying a second electrical signal to a second target location of the patient's spinal cord region at a frequency in a second frequency range of from about 2,500 Hz to about 100,000 Hz.

US Patent:

59907045, Nov 23, 1999

Filed:

Oct 2, 1997

Appl. No.:

8/942858

Inventors:

Charles R. Erickson - Fremont CA
Brian D. Erickson - Soquel CA

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H03K 190175
H03K 1920

US Classification:

326 56

Abstract:

A multi-state input drive structure is provided to forward externally generated high and low input signals, as well as to receive at least a third, internally generated, comparatively weak signal, preferably an oscillating signal, which triggers a third internally forwarded signal when neither of the high and low input signals is received. The inventive circuit drives three internally forwarded output signals from a single external signal source. Since this circuit may be duplicated for every pin on a device for which two cycle delays do not affect performance, availability of a third input state on N inputs allows 3. sup. N input codes as opposed to 2. sup. N for the conventional "high" and "low" levels normally available.

US Patent:

61007056, Aug 8, 2000

Filed:

Dec 18, 1998

Appl. No.:

9/216278

Inventors:

Charles R. Erickson - Fremont CA
Brian D. Erickson - Soquel CA

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

G01R 31305

US Classification:

324751

Abstract:

A method and structure for testing static signal levels on an integrated circuit device using an electron beam deflection device. Each static signal is applied to a first terminal of a switch, such as an AND gate, an OR gate, or a pass transistor. An alternating control signal of approximately 1 MHz is transmitted to a second terminal of the switch such that the switch generates an output signal that is either constant (if the static signal is at a first level), or has a frequency equal to that of the alternating control signal (if the static signal is at a second level). The output signal is transmitted to a pad located on an exposed surface of the integrated circuit, where an electron beam deflection device is utilized to determine the static signal level by detecting the presence or absence of an alternating signal. A method for determining the voltage level of a signal includes applying the signal to the gate of a transistor and an alternating control signal to an input terminal. An electron beam deflection device is then utilized to measure the voltage level of a signal generated at an output terminal of the transistor.