Brian James Moran

US Patent:

7284043, Oct 16, 2007

Filed:

Sep 23, 2004

Appl. No.:

10/948927

Inventors:

David A. Feinleib - Palo Alto CA, US
Brian K. Moran - Preston WA, US

International Classification:

G06F 15/16

US Classification:

709220, 719319

Abstract:

A system and method for automating the migration of configuration settings and data from computer systems running the LINUX operating system to computer systems running the WINDOWS operating system. The invention utilizes data from one or more sources to create the configuration of the target system, and translates between settings related to the LINUX systems and WINDOWS systems involved. As a result, it simplifies the otherwise complex and time-consuming task of migrating from one server to another, specifically when migrating between two operating systems that provide similar functionality but are configured in distinctly different ways.

US Patent:

20210117624, Apr 22, 2021

Filed:

Aug 20, 2020

Appl. No.:

16/998423

Inventors:

- Menlo Park CA, US
Sonal Gupta - Sunnyvale CA, US
Brian Moran - Redmond WA, US
Theodore Frank Levin - Seattle WA, US
Crystal Annette Naomi Su Hua Nakatsu - San Jose CA, US
Daniel Difranco - Seattle WA, US
Jonathan David Christensen - Redmond WA, US
Kirk LaBuda - Seattle WA, US
Anuj Kumar - Santa Clara CA, US

International Classification:

G06F 40/30
G06F 40/205
G06F 9/54

Abstract:

In one embodiment, a method includes receiving a user input comprising a natural-language utterance by an assistant xbot from a client system associated with a user, determining a semantic representation of the user input based on a structural ontology defining a labeling syntax for parsing the natural-language utterance to semantic units comprising actions, objects, and attributes, wherein the semantic representation embeds at least one object within at least one action and declares at least one attribute of the embedded object to be acted upon, sending a request based on the semantic representation to an agent for executing a task corresponding to the user input, receiving results of the executed task mapped to a structure determined by the structural ontology from the agent, and sending from the assistant xbot to the client system instructions for presenting a response based on the results of the executed task.

US Patent:

20210075070, Mar 11, 2021

Filed:

Sep 9, 2020

Appl. No.:

17/016233

Inventors:

- Plymouth MI, US
Scott Kochan - San Jose CA, US
Alwin Lutz - Aliso Viejo CA, US
Brian Moran - Rancho Santa Margarita CA, US
Jeff Taberski - Yorba Linda CA, US

International Classification:

H01M 10/48
H01M 10/42
G01R 31/392
G01R 31/3842
G01R 19/22
H02M 3/335

Abstract:

A cell management module for a power supply module including a plurality of power cells includes at least one cell-sensing circuit and a current measurement circuit connected to the at least one cell-sensing circuit. The at least one cell-sensing circuit includes a transformer having a first winding and a second winding inductively coupled to the first winding. A first sub-circuit of the cell-sensing circuit includes the first winding of the transformer and is operable to selectively pulse a first signal through the first winding. A second sub-circuit of the cell-sensing circuit includes the second winding of the transformer and one of the power cells of the power supply module. The current measurement circuit is connected to the first sub-circuit of the at least one cell-sensing circuit and infers a voltage of the power cell based on a measured current of the first signal.

US Patent:

20150234726, Aug 20, 2015

Filed:

Dec 19, 2014

Appl. No.:

14/578191

Inventors:

Brian P. Moran - Gold River CA, US
Konika Ganguly - Portland OR, US
Rebecca Z. Loop - Hillsboro OR, US
Xiang Li - Portland OR, US
Christopher E. Cox - Placerville CA, US

International Classification:

G06F 11/30
G06F 13/40

Abstract:

Techniques and mechanisms to exchange communications via a printed circuit board (PCB) between a processor device and a memory device. In an embodiment, the processor device is configured based on a memory type of the memory device to an interface mode of multiple interface modes each corresponding to a different respective one of multiple memory standards. A voltage regulator (VR) is programmed, based on the memory type, to a VR mode to provide one or more voltages to the memory device via a hardware interface on the PCB. In another embodiment, x signal lines of an interconnect disposed in or on the PCB are each coupled between the processor device and the memory device to one another. The value x is an integer equal to a total number of signals of a superset of sets of signals each specified by a different respective one of the multiple memory standards.