Cesar Jesus Garza

US Patent:

6649452, Nov 18, 2003

Filed:

Feb 28, 2002

Appl. No.:

10/085960

Inventors:

Kevin D. Lucas - Austin TX
William L. Wilkinson - Georgetown TX
Cesar Garza - Round Rock TX

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H01L 2182

US Classification:

438129, 430 5

Abstract:

A lithographic reticle with subresolution features in the design-pattern is used to control critical dimensions in a semiconductor manufacturing process. After the location of design and processing features is determined, subresolution features are formed in areas devoid of design and processing features. The subresolution features can substantially fill all of the area devoid of design processing features or, instead, selectively fill portions of the area. In one embodiment, the width of the area devoid of design and processing features is less than two times the width of a feature. The presence of the subresolution features results in improved control of small dimensions of features in semiconductor processing, thereby increasing yield and device performance.

US Patent:

6797440, Sep 28, 2004

Filed:

Aug 6, 2002

Appl. No.:

10/213344

Inventors:

Cesar M. Garza - Round Rock TX
Wei E. Wu - Austin TX
Bernard J. Roman - Austin TX
Pawitter J. S. Mangat - Gilbert AZ
Kevin J. Nordquist - Higley AZ
William J. Dauksher - Mesa AZ

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

G03F 900

US Classification:

430 5, 430394

Abstract:

A semiconductor device is formed by patterning a resist layer using a rim phase shifting mask. A multilayer or single patterning layer to form the different phase-shifting regions and opaque regions is used to manufacture the rim phase shifting mask. First phase shifting regions are formed by transferring an opening in the multilayer or single patterning layer through an opaque layer and a transparent substrate. At least portions of the same multilayer or single patterning layer are used to recess the opaque layer a predetermined distance to form rims (second phase shifting regions). The first phase-shifting regions phase shift the light traveling through them 180 degrees relative to the light traveling through the rims, thereby increasing the contrast of the light traveling through the rim phase shifting mask.

US Patent:

6849515, Feb 1, 2005

Filed:

Sep 25, 2003

Appl. No.:

10/670634

Inventors:

Cesar M. Garza - Round Rock TX, US

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

H01L 21336

US Classification:

438301, 438304, 438306

Abstract:

A semiconductor process and structure () uses a disposable sidewall spacer () associated with lightly doped drain (LDD) transistors. The disposable sidewall spacers are efficiently removed by a gaseous fluorine ambient. Either molecular or atomic fluorine gas is used to remove a silicon germanium sidewall spacer with high selectivity to exposed insulating layers. This etch process is also isotropic. An additional benefit of using a gaseous fluorine ambient is incorporation of fluorine in isolation regions () surrounding the transistors, thereby reducing the dielectric constant. Improved insulating properties of the isolations regions can allow increased integration.

US Patent:

7157377, Jan 2, 2007

Filed:

Feb 13, 2004

Appl. No.:

10/779007

Inventors:

Cesar M. Garza - Round Rock TX, US
William D. Darlington - Austin TX, US
Stanley M. Filipiak - Pflugerville TX, US
James E. Vasek - Austin TX, US

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

H01L 21/311

US Classification:

438694, 438585, 438705, 438945, 438947, 257E21026

Abstract:

A semiconductor device is made by patterning a conductive layer for forming gates of transistors. The process for forming the gates has a step of patterning photoresist that overlies the conductive layer. The patterned photoresist is trimmed so that its width is reduced. Fluorine, preferably F, is applied to the trimmed photoresist to increase its hardness and its selectivity to the conductive layer. Using the trimmed and fluorinated photoresist as a mask, the conductive layer is etched to form conductive features useful as gates. Transistors are formed in which the conductive pillars are gates. Other halogens, especially chlorine, may be substituted for the fluorine.

US Patent:

20040137371, Jul 15, 2004

Filed:

Jan 9, 2003

Appl. No.:

10/339062

Inventors:

Cesar Garza - Round Rock TX, US
Thomas Bierschenk - Georgetown TX, US
Hajimu Kawa - Austin TX, US

International Classification:

G03F007/20

US Classification:

430/311000, 430/327000, 430/005000

Abstract:

In semiconductor manufacturing, a pellicle film () is used to protect the surface of a reticle (). The reticle () is used in an optical microlithography system () to pattern semiconductor wafers (). To work properly, the pellicle () must be transparent at the particular wavelength of light used to expose photoresist through the reticle (). The pellicle () is made more transparent to short wavelength light used by the optical microlithography system by removing unwanted hydrogen in the pellicle (). The unwanted hydrogen is removed by exposing the pellicle () to a gas containing fluorine. This unwanted hydrogen apparently came as artifacts of the process of the making the pellicle (), particularly the chemicals introduced to terminate the polymerization process and the ones used as solvents.

US Patent:

20050026084, Feb 3, 2005

Filed:

Jul 31, 2003

Appl. No.:

10/631283

Inventors:

Cesar Garza - Round Rock TX, US
Willard Conley - Austin TX, US
William Taylor - Round Rock TX, US

International Classification:

G03F007/00

US Classification:

430311000, 430327000

Abstract:

A semiconductor device () includes a photoresist layer () for patterning features on the semiconductor device () during manufacturing. After the photoresist layer () is deposited, the semiconductor device () is exposed to fluorine using a fluorination module (). In one embodiment, the fluorine is applied via a plasma in the fluorination module (). In other embodiments, the fluorine may be applied in other gaseous or liquid forms. Fluorinating the photoresist layer () functions to prevent slimming of the features when dimensions of the features are measured using a scanning electron microscope (SEM).

US Patent:

20050224455, Oct 13, 2005

Filed:

Jun 2, 2005

Appl. No.:

11/143295

Inventors:

Patrick Montgomery - Austin TX, US
Cesar Garza - Round Rock TX, US
William Taylor - Round Rock TX, US

International Classification:

H01L021/302
B44C001/22

US Classification:

216041000, 216058000, 216083000, 216074000, 438689000

Abstract:

Photoresist, which contains hydrogen, is patterned over a semiconductor substrate then treated with either a molecular halogen or a liquid fluorinating agent in order to improve subsequent ion implantation. Hydrogen is replaced, to whatever extent is found desirable, with the halogen. Molecular fluorine (F) has been found to be particularly effective as the molecular halogen. Molecular fluorine (F) reacts very efficiently in replacing the hydrogen and further has the benefit of continuing to penetrate into the patterned photoresist so that the entire patterned photoresist layer can have the hydrogen atoms replaced with fluorine atoms if the molecular fluorine flow is continued long enough. The resulting treated photoresist is much more resistant to penetration by implanted ions so that the photoresist can be deposited to a lesser thickness. This is beneficial in shadowing problems such as can occur in halo implants and where the patterned photoresist has a high aspect ratio.

Address:

7700 W Parmer Ln, Austin, TX 78729

VIN:

4T1BK46K87U524496

Make:

TOYOTA

Model:

CAMRY

Year:

2007

Address:

224 Southern Cross Dr, Austin, TX 78717

Phone:

(512)5513418

VIN:

JTEBU14R470115511

Make:

TOYOTA

Model:

4RUNNER

Year:

2007