Chao Chun Li

US Patent:

20110136304, Jun 9, 2011

Filed:

Jun 11, 2010

Appl. No.:

12/814254

Inventors:

Eric W. Wong - Los Angeles CA, US
Brian D. Hunt - La Crescenta CA, US
Rajay Kumar - Huntington Beach CA, US
Chao Li - Arcadia CA, US

Assignee:

ETAMOTA CORPORATION - Pasadena CA

International Classification:

H01L 21/338
B82Y 40/00

US Classification:

438167, 977742, 257E2145

Abstract:

Techniques are used to fabricate carbon nanotube devices. These techniques improve the selective removal of undesirable nanotubes such as metallic carbon nanotubes while leaving desirable nanotubes such as semiconducting carbon nanotubes. In a first technique, slot patterning is used to slice or break carbon nanotubes have a greater length than desired. By altering the width and spacing of the slotting, nanotubes have a certain length or greater can be removed. Once the lengths of nanotubes are confined to a certain or expected range, the electrical breakdown approach of removing nanotubes is more effective. In a second technique, a Schottky barrier is created at one electrode (e.g., drain or source). This Schottky barrier helps prevent the inadvertent removal the desirable nanotubes when using the electrical breakdown approach. The first and second techniques can be used individually or in combination with each other.

US Patent:

20220237670, Jul 28, 2022

Filed:

Apr 15, 2022

Appl. No.:

17/721594

Inventors:

- Bentonville AR, US
Elham SHAABANI - Redwood City CA, US
Chao LI - San Carlos CA, US
Matyas A. SUSTIK - San Francisco CA, US

International Classification:

G06Q 30/02
G06K 9/62
G06Q 20/20
G06N 20/00
G06Q 10/06

Abstract:

This application relates to apparatus and methods for identifying anomalies within data, such as pricing data. In some examples, a computing device receives data updates and selects a machine learning model to apply to the data update. The computing device may train the machine learning model with features generated based on historical purchase order data. An anomaly score is generated based on application of the machine learning model. Based on the anomaly score, the data update is either allowed, or denied. In some examples, the computing device re-trains the machine learning model with detected anomalies. In some embodiments, the computing device prioritizes detected anomalies for further investigation. In some embodiments, the computing device identifies the cause of the anomalies by identifying at least one feature that is causing the anomaly.

US Patent:

20230093450, Mar 23, 2023

Filed:

Nov 30, 2022

Appl. No.:

18/072457

Inventors:

- Santa Clara CA, US
Rui CHENG - Santa Clara CA, US
Karthik JANAKIRAMAN - San Jose CA, US
Zubin HUANG - Santa Clara CA, US
Diwakar KEDLAYA - Santa Clara CA, US
Meenakshi GUPTA - San Jose CA, US
Srinivas GUGGILLA - San Jose CA, US
Yung-chen LIN - Gardena CA, US
Hidetaka OSHIO - Tokyo, JP
Chao LI - Santa Clara CA, US
Gene LEE - San Jose CA, US

International Classification:

H01L 21/033
H01L 21/311
H01L 21/3213

Abstract:

The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a first mandrel layer on a material layer disposed on a substrate. A first spacer layer is conformally formed on sidewalls of the first mandrel layer, wherein the first spacer layer comprises a doped silicon material. The first mandrel layer is selectively removed while keeping the first spacer layer. A second spacer layer is conformally formed on sidewalls of the first spacer layer and selectively removing the first spacer layer while keeping the second spacer layer.

US Patent:

20200380570, Dec 3, 2020

Filed:

May 30, 2019

Appl. No.:

16/427238

Inventors:

- Bentonville AR, US
Elham SHAABANI - Redwood City CA, US
Chao LI - San Carlos CA, US
Matyas A. SUSTIK - San Francisco CA, US

International Classification:

G06Q 30/02
G06K 9/62
G06Q 10/06
G06N 20/00
G06Q 20/20

Abstract:

This application relates to apparatus and methods for identifying anomalies within data, such as pricing data. In some examples, a computing device receives data updates and selects a machine learning model to apply to the data update. The computing device may train the machine learning model with features generated based on historical purchase order data. An anomaly score is generated based on application of the machine learning model. Based on the anomaly score, the data update is either allowed, or denied. In some examples, the computing device re-trains the machine learning model with detected anomalies. In some embodiments, the computing device prioritizes detected anomalies for further investigation. In some embodiments, the computing device identifies the cause of the anomalies by identifying at least one feature that is causing the anomaly.

US Patent:

20200380571, Dec 3, 2020

Filed:

May 30, 2019

Appl. No.:

16/427241

Inventors:

- Bentonville AR, US
Elham SHAABANI - Redwood City CA, US
Chao LI - San Carlos CA, US
Matyas A. SUSTIK - San Francisco CA, US

International Classification:

G06Q 30/02
G06K 9/00
G06F 17/11
G06Q 10/06
G06N 20/00
G06Q 20/20

Abstract:

This application relates to apparatus and methods for identifying anomalies within data, such as pricing data. In some examples, a computing device receives data updates and selects a machine learning model to apply to the data update. The computing device may train the machine learning model with features generated based on historical purchase order data. An anomaly score is generated based on application of the machine learning model. Based on the anomaly score, the data update is either allowed, or denied. In some examples, the computing device re-trains the machine learning model with detected anomalies. In some embodiments, the computing device prioritizes detected anomalies for further investigation. In some embodiments, the computing device identifies the cause of the anomalies by identifying at least one feature that is causing the anomaly.

US Patent:

20200335338, Oct 22, 2020

Filed:

Mar 17, 2020

Appl. No.:

16/821759

Inventors:

- Santa Clara CA, US
Rui CHENG - Santa Clara CA, US
Karthik JANAKIRAMAN - San Jose CA, US
Zubin HUANG - Santa Clara CA, US
Meenakshi GUPTA - San Jose CA, US
Srinivas GUGGILLA - San Jose CA, US
Yung-chen LIN - Gardena CA, US
Hidetaka OSHIO - Tokyo, JP
Chao LI - Santa Clara CA, US
Gene LEE - San Jose CA, US

International Classification:

H01L 21/033

Abstract:

The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a mandrel layer on a substrate, conformally forming a spacer layer on the mandrel layer, wherein the spacer layer is a doped silicon material, and patterning the spacer layer. In another embodiment, a method for forming features on a substrate includes conformally forming a spacer layer on a mandrel layer on a substrate, wherein the spacer layer is a doped silicon material, selectively removing a portion of the spacer layer using a first gas mixture, and selectively removing the mandrel layer using a second gas mixture different from the first gas mixture.

US Patent:

20200335339, Oct 22, 2020

Filed:

May 5, 2020

Appl. No.:

16/867095

Inventors:

- Santa Clara CA, US
Rui CHENG - Santa Clara CA, US
Karthik JANAKIRAMAN - San Jose CA, US
Zubin HUANG - Santa Clara CA, US
Diwakar KEDLAYA - Santa Clara CA, US
Meenakshi GUPTA - San Jose CA, US
Srinivas GUGGILLA - San Jose CA, US
Yung-chen LIN - Gardena CA, US
Hidetaka OSHIO - Tokyo, JP
Chao LI - Santa Clara CA, US
Gene LEE - San Jose CA, US

International Classification:

H01L 21/033

Abstract:

The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a first mandrel layer on a material layer disposed on a substrate. A first spacer layer is conformally formed on sidewalls of the first mandrel layer, wherein the first spacer layer comprises a doped silicon material. The first mandrel layer is selectively removed while keeping the first spacer layer. A second spacer layer is conformally formed on sidewalls of the first spacer layer and selectively removing the first spacer layer while keeping the second spacer layer.