Charles Royce Austin

US Patent:

6578123, Jun 10, 2003

Filed:

Nov 25, 1997

Appl. No.:

08/978169

Inventors:

Charles C. Austin - Mission Viejo CA
Kevin Feshangchi - Mission Viejo CA
Jeff Harth - Tustin CA

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 1200

US Classification:

711165, 711166, 711171, 711173

Abstract:

Apparatus for flexibly locating the data page on which the peripheral registers are located. External hardware contentions are eliminated because the peripheral registers can be relocated anywhere in the system address space. Hardware design is therefore much more flexible. Further, because the present invention allows peripheral registers to overlay internal data memory, data transfers can be carried out between data and peripherals using the same data page pointer. No intermediate pointer loading operations are required and memory operations to the peripheral registers can be carried out at maximum speed. The present invention allows peripheral registers to overlay data memory in a manner that permits the overlaid memory to be recovered and used for other purposes. Processor program code can be designed to overlay internal data memory with the peripheral registers while performing data transfers between the data memory and the peripheral registers. The overlaid data memory is not accessible while it is overlaid.

US Patent:

53110692, May 10, 1994

Filed:

Sep 6, 1991

Appl. No.:

7/756057

Inventors:

Charles C. Austin - Mission Viejo CA

Assignee:

Silicon Systems, Inc. - Tustin CA

International Classification:

G06G 712
H03K 5153

US Classification:

307262

Abstract:

The present invention provides driver circuitry for commutated inductive loads, and in particular, inductive loads employed in multi-pole DC brushless motors. The preferred embodiment of the present invention typically implements three pull-up and three pull-down drivers for motor control. The pull-down driver circuit described in the present invention can be configured to be adjusted by an external component of the integrated circuit implementation in order for controlling turn-off transients. Voltage transients due to changes in load current in the control loop of the pull-down driver circuit can be minimized or deterministically controlled by controlling the rate of change of the input voltage. For the case of when the load current is to be completely switched from one inductor to another inductor, an additional unity gain buffer coupled to the input voltage is inserted into the control loop of the pull-down driver circuit for reducing the voltage transients that can result. The output voltage rise and fall times of the pull-up driver circuit of the present invention can be controlled by means of an accurate clock rate, a capacitance ratio value, an arbitrary voltage supply or by any combination of the above means.

US Patent:

54061504, Apr 11, 1995

Filed:

Aug 24, 1992

Appl. No.:

7/934860

Inventors:

Charles C. Austin - Mission Viejo CA

International Classification:

H03K 17687

US Classification:

327110

Abstract:

The present invention provides a system for controlling current through inductive elements by automatically switching between a pulse width modulation mode and a linear mode, depending upon the current demands of the inductive elements. A time-base circuit provides periodic pulses that allow current to flow through an inductive device. The current through the inductive device increases over time. If the current through the inductive device exceeds a specified value, the current is shut off until the next pulse from the time-base circuit. After the power supply current has been shut off, current through the inductive device continues to flow through flyback diodes, gradually decreasing over time. Another pulse is provided by the time-base circuit before the current is allowed to reach zero. By controlling the duration and rate of increase and decrease of current through the inductive device, a method of current control for inductive elements has been provided.

US Patent:

53192893, Jun 7, 1994

Filed:

Feb 24, 1992

Appl. No.:

7/840440

Inventors:

Charles C. Austin - Mission Viejo CA
Bertram J. White - Irvine CA

Assignee:

Silicon Systems, Inc. - Tustin CA

International Classification:

H02P 602

US Classification:

318254

Abstract:

A circuit to provide adaptive commutation delay for multi-pole brushless DC motors. The circuit adjusts the commutation delay as a function of the rotational speed of the motor to maximize motor torque and minimize power consumption. Unlike the prior art, the circuit avoids the need for complex circuitry or external components. The circuit may be implemented entirely within a single integrated circuit. The circuit includes a back-EMF sensing input, an oscillator, a voltage holding and proportioning circuit, one or more comparators and, optionally, an external control circuit. The back-EMF sensing input controls the operation of the oscillator. The voltage holding and proportioning circuit processes the oscillator output and provides outputs which are compared by the comparators. The comparators produce commutation delay signals and, optionally, other signals. The circuit also allows adjustment to compensate for non-ideal back-EMF-to-rotor-position correspondence or fixed time delays inherent in the commutation process.

US Patent:

47913231, Dec 13, 1988

Filed:

Oct 23, 1986

Appl. No.:

6/922536

Inventors:

Charles C. Austin - El Toro CA

Assignee:

Silicon Systems, Inc. - Tustin CA

International Classification:

H03K 19092
H03K 1716
H03K 17687

US Classification:

307475

Abstract:

A TTL/CMOS interface circuit comprised entirely of CMOS components. An input gain stage comprised of transistors of a single conductivity type is provided whose gain is established by the ratio of the geometric size of the transistors. In the preferred embodiment of the present invention, the input gain stage is comprised of N channel transistors to a void process related mismatches. An inverter stage has a switching threshold set to optimally operate with the output of the input gain stage. The voltage at the inverter stage is tied to the power supply voltage to supply an upper voltage limit. In order to provide for zero power operation for input signals close the value of the supply voltage, a transistor is provided to cut current flow in the input stage for input signals within a threshold voltage of the supply voltage. The present circuit may also be utilized as to allow zero power operation for input signals close to ground.

US Patent:

52169200, Jun 8, 1993

Filed:

Feb 11, 1992

Appl. No.:

7/833948

Inventors:

Charles T. Austin - Houston TX

International Classification:

G01V 702

US Classification:

73382R

Abstract:

Shipboard gravity data are currently recorded with one shipboard gravity meter. Gravity data are tied to the international gravity datum when the boat docks about every 30 days. The accuracy of these data is about 0. 5 milligals and not sufficiently accurate for detailed quantitative interpretation. It is possible to increase the accuracy of shipboard gravity data twofold by using the procedure we have described. A stable boat with precision navigation and water depth soundings is necessary. Two gravity meters are calibrated to read the same values and times. These are placed near the center of the boat with one meter facing forward and one facing backward for plus and minus cross coupling, or simultaneous accelerations in different directions. Integration of the gravity recordings cancels random noise. This innovation increases the accuracy to 0.