Chi Lo

US Patent:

20120075216, Mar 29, 2012

Filed:

Sep 16, 2011

Appl. No.:

13/235158

Inventors:

Justin Phelps Black - Santa Clara CA, US
Ravindra V. Shenoy - Dublin CA, US
Evgeni Petrovich Gousev - Saratoga CA, US
Aristotele Hadjichristos - San Diego CA, US
Thomas Andrew Myers - San Diego CA, US
Jonghae Kim - San Diego CA, US
Mario Francisco Velez - San Diego CA, US
Je-Hsiung Jeffrey Lan - San Diego CA, US
Chi Shun Lo - San Diego CA, US

Assignee:

QUALCOMM MEMS TECHNOLOGIES, INC. - San Diego CA

International Classification:

G06F 3/041
H01L 21/02
H03F 3/04
H01L 27/06

US Classification:

345173, 257531, 438381, 330289, 257E21003, 257E27011

Abstract:

This disclosure provides systems, methods and apparatus for combining devices deposited on a first substrate, with integrated circuits formed on a second substrate such as a semiconducting substrate or a glass substrate. The first substrate may be a glass substrate. The first substrate may include conductive vias. A power combiner circuit may be deposited on a first side of the first substrate. The power combiner circuit may include passive devices deposited on at least the first side of the first substrate. The integrated circuit may include a power amplifier circuit disposed on and configured for electrical connection with the power combiner circuit, to form a power amplification system. The conductive vias may include thermal vias configured for conducting heat from the power amplification system and/or interconnect vias configured for electrical connection between the power amplification system and a conductor on a second side of the first substrate.

US Patent:

20140035702, Feb 6, 2014

Filed:

Jul 31, 2012

Appl. No.:

13/563252

Inventors:

Justin Phelps Black - Santa Clara CA, US
Philip Jason Stephanou - Mountain View CA, US
Jonghae Kim - San Diego CA, US
Je-Hsiung Jeffrey Lan - San Diego CA, US
Sang-June Park - San Diego CA, US
Changhan Hobie Yun - San Diego CA, US
Chi Shun Lo - San Diego CA, US
Chengjie Zuo - Santee CA, US

Assignee:

QUALCOMM MEMS TECHNOLOGIES, INC. - San Diego CA

International Classification:

H03H 9/00
H03H 7/01

US Classification:

333186, 333193, 333187, 333175

Abstract:

This disclosure provides implementations of filters and filter topologies, circuits, structures, devices, apparatus, systems, and related processes. In one aspect, a device includes one or more LC resonant circuit stages. In some implementations, each LC stage includes an inductor and a capacitor. Each LC stage also has a corresponding resonant frequency. The one or more LC stages are arranged to produce an unmodified passband over a range of frequencies having a corresponding bandwidth. One or more microelectromechanical systems (MEMS) resonators are arranged with the one or more LC stages. The one or more MEMS resonators are arranged with the one or more LC stages so as to modify characteristics of the unmodified passband such that the hybrid filter produces a modified passband having a modified bandwidth and one or more other modified band characteristics.

US Patent:

20140035935, Feb 6, 2014

Filed:

Aug 3, 2012

Appl. No.:

13/566925

Inventors:

Ravindra V. Shenoy - Dublin CA, US
Kwan-Yu Lai - San Jose CA, US
Jon Bradley Lasiter - Stockton CA, US
Jonghae Kim - San Diego CA, US
Mario Francisco Velez - San Diego CA, US
Chi Shun Lo - San Diego CA, US
Donald William Kidwell - Los Gatos CA, US
Philip Jason Stephanou - Mountain View CA, US
Justin Phelps Black - Santa Clara CA, US
Evgeni Petrovich Gousev - Saratoga CA, US

Assignee:

QUALCOMM MEMS TECHNOLOGIES, INC. - San Diego CA

International Classification:

H05K 7/00
H01F 41/00
G06T 1/00
H01L 21/56
H05K 1/00
H05K 1/09
H01R 43/20
H01L 23/29

US Classification:

345501, 29825, 296021, 216 18, 257774, 438113, 174258, 361748, 361782, 174257, 361746, 257E23118, 257E21504

Abstract:

This disclosure provides systems, methods and apparatus for glass via bars that can be used in compact three-dimensional packages, including embedded wafer level packages. The glass via bars can provide high density electrical interconnections in a package. In some implementations, the glass via bars can include integrated passive components. Methods of fabricating glass via bars are provided. In some implementations, the methods can include patterning and etching photo-patternable glass substrates. Packaging methods employing glass via bars are also provided.

US Patent:

55766269, Nov 19, 1996

Filed:

Jan 17, 1995

Appl. No.:

8/375330

Inventors:

Chi K. Lo - Fremont CA

Assignee:

Microsensor Technology, Inc. - Fremont CA

International Classification:

G01N 2762

US Classification:

324464

Abstract:

A compact and low fuel consumption flame ionization detector includes a precisely pored metallic disk or a silicon micro-machined diffuser plate through which the sample gas tube extends a minimum distance (less than 2 mm). The oxidant flows into the detector in a direction parallel to a plane of the diffuser plate, passes into a small cavity under the diffuser, and then passes through a large number of very small holes formed in the diffuser plate before encountering the sample gas flow at the end of the gas tube. A narrow diameter collector is closely spaced to the end of the gas tube. The direction of feeding the air and the diffuser plate (which acts as a baffle) provide laminar flow and eliminate the flicker noise which would otherwise occur due to the air flow inlet being located very close to the gas tube end. The FID is vertically compact and operates at a high electric field strength, exceeding 90 V/mm. The FID has a low fuel flow, typically 12-15 ml/min and therefore a low oxidant flow rate, typically 120-150 ml/min, advantageous to the operation of a portable gas chromatograph.

US Patent:

20210010160, Jan 14, 2021

Filed:

Sep 29, 2020

Appl. No.:

17/037165

Inventors:

- Santa Clara CA, US
Theresa Kramer GUARINI - San Jose CA, US
Jeffrey A. TOBIN - Mountain View CA, US
Lara HAWRYLCHAK - Gilroy CA, US
Peter STONE - Los Gatos CA, US
Chi Wei LO - San Jose CA, US
Saurabh CHOPRA - Santa Clara CA, US

International Classification:

C30B 25/18
C30B 29/06
C30B 29/08

Abstract:

Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.

US Patent:

20190382917, Dec 19, 2019

Filed:

Aug 26, 2019

Appl. No.:

16/550933

Inventors:

- Santa Clara CA, US
Theresa K. GUARINI - San Jose CA, US
Jeffrey TOBIN - Mountain View CA, US
Lara HAWRYLCHAK - Gilroy CA, US
Peter STONE - Los Gatos CA, US
Chi Wei LO - San Jose CA, US
Saurabh CHOPRA - Santa Clara CA, US

International Classification:

C30B 25/18
C30B 29/08
C30B 29/06

Abstract:

Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.

US Patent:

20190325905, Oct 24, 2019

Filed:

Apr 20, 2018

Appl. No.:

15/959120

Inventors:

- San Jose CA, US
Arien Michael Ghaderi - Morgan Hill CA, US
Tuqiang Li - San Jose CA, US
Chi Ho Lo - Milpitas CA, US

International Classification:

G11B 5/66
G11B 5/82
G11B 5/84

Abstract:

Magnetic media including a magnetic recording layer structure of at least six magnetic recording sublayers and at least six non-magnetic exchange control sublayers in an alternating pattern are provided. The magnetic recording layer structure includes a gradient of platinum content across the magnetic recording sublayers such that a top magnetic recording sublayer has a lowest platinum content and a bottom magnetic recording sublayer has a highest platinum content. In one such case, the magnetic media includes a substrate and the magnetic recording layer structure on the substrate. In another case, a method of fabricating such magnetic media is provided.

US Patent:

20180016705, Jan 18, 2018

Filed:

Jun 19, 2017

Appl. No.:

15/627149

Inventors:

- Santa Clara CA, US
Theresa K. GUARINI - San Jose CA, US
Jeffrey TOBIN - Mountain View CA, US
Lara HAWRYLCHAK - Gilroy CA, US
Peter STONE - Los Gatos CA, US
Chi Wei LO - San Jose CA, US
Saurabh CHOPRA - Santa Clara CA, US

International Classification:

C30B 25/18
C30B 29/08
C30B 29/06

Abstract:

Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.