Chirag R Patel

US Patent:

6690081, Feb 10, 2004

Filed:

Nov 19, 2001

Appl. No.:

09/993100

Inventors:

Muhannad S. Bakir - Atlanta GA
Hollie Reed - Atlanta GA
Paul Kohl - Atlanta GA
Chirag S. Patel - Peekskill NY
Kevin P. Martin - Atlanta GA
James Meindl - Marietta GA

Assignee:

Georgia Tech Research Corporation - Atlanta GA

International Classification:

H01L 2900

US Classification:

257522, 257792, 257506, 438461, 438421

Abstract:

Devices and method of fabrication thereof are disclosed. A representative device includes one or more lead packages. The lead packages include a substrate including a plurality of die pads, an overcoat polymer layer, a plurality of sacrificial polymer layers disposed between the substrate and the overcoat polymer layer, and a plurality of leads. Each lead is disposed upon the overcoat polymer layer having a first portion disposed upon a die pad. The sacrificial polymer layer can be removed to form one or more air-gaps.

US Patent:

6785458, Aug 31, 2004

Filed:

Feb 11, 2002

Appl. No.:

10/074420

Inventors:

Chirag Patel - College Park GA
James D. Meindl - Marietta GA
Thomas K. Gaylord - Atlanta GA
Elias N. Glytsis - Dunwoody GA
Kevin P. Martin - Atlanta GA
Stephen M. Schultz - Tucson AZ
Muhannad Bakir - Atlanta GA
Hollie Reed - Smyrna GA
Paul Kohl - Atlanta GA

Assignee:

Georgia Tech Research Corporation - Atlanta GA

International Classification:

G02B 610

US Classification:

385131, 385132

Abstract:

Wafer-level electronic packages having waveguides and methods of fabricating chip-level electronic packages having waveguides are disclosed. A representative chip-level electronic package includes at least one waveguide having a waveguide core. In addition, another representative chip-level electronic package includes a waveguide having an air-gap cladding layer around a portion of the waveguide core. A representative method for fabricating a chip-level electronic package includes: providing a substrate having a passivation layer disposed on the substrate; disposing a waveguide core on a portion of the passivation layer; disposing a first sacrificial layer onto at least one portion of the passivation layer and the waveguide core; disposing an overcoat layer onto the passivation layer and the first sacrificial layer; and removing the first sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and around a portion of the waveguide core.

US Patent:

6954576, Oct 11, 2005

Filed:

Jul 21, 2004

Appl. No.:

10/895685

Inventors:

Chirag Patel - College Park GA, US
James D. Meindl - Marietta GA, US
Thomas K. Gaylord - Atlanta GA, US
Elias N. Glytsis - Dunwoody GA, US
Kevin P. Martin - Atlanta GA, US
Stephen M. Schultz - Tucson AZ, US
Muhannad Bakir - Atlanta GA, US
Hollie Reed - Smyrna GA, US
Paul Kohl - Atlanta GA, US

Assignee:

Georgia Tech Research Corporation - Atlanta GA

International Classification:

G02B006/10

US Classification:

385131, 438 31

Abstract:

Wafer-level electronic packages having waveguides and methods of fabricating chip-level electronic packages having waveguides are disclosed. A representative chip-level electronic package includes at least one waveguide having a waveguide core. In addition, another representative chip-level electronic package includes a waveguide having an air-gap cladding layer around a portion of the waveguide core. A representative method for fabricating a chip-level electronic package includes: providing a substrate having a passivation layer disposed on the substrate; disposing a waveguide core on a portion of the passivation layer; disposing a first sacrificial layer onto at least one portion of the passivation layer and the waveguide core; disposing an overcoat layer onto the passivation layer and the first sacrificial layer; and removing the first sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and around a portion of the waveguide core.

US Patent:

7132736, Nov 7, 2006

Filed:

Oct 31, 2002

Appl. No.:

10/285034

Inventors:

Muhannad S. Bakir - Atlanta GA, US
James D. Meindl - Marietta GA, US
Chirag S. Patel - College Park GA, US

Assignee:

Georgia Tech Research Corporation - Atlanta GA

International Classification:

H01L 29/40
H01L 23/02
H01L 23/48

US Classification:

257678, 257621, 257696, 257773, 257667, 257798, 257777, 257784, 257786, 257783, 257776, 257775, 361776, 361774, 361784, 361773, 174262, 174260, 174250, 385 14

Abstract:

Devices and methods of fabrication thereof are disclosed. A representative device includes a complaint wafer-level package having one or more lead packages. A representative lead package includes a substrate having a plurality of die pads disposed thereon and a plurality of leads attached to the plurality of die pads. In addition, the lead package includes a plurality of pillars made of a low modulus material. Each pillar is disposed between the substrate and at least one lead, and each lead is disposed upon one of the pillars that compliantly support the lead.