Chiu Yuen Ng

US Patent:

6426248, Jul 30, 2002

Filed:

Dec 11, 2000

Appl. No.:

09/734429

Inventors:

Richard Francis - Manhattan Beach CA
Chiu Ng - El Segundo CA

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H01L 21336

US Classification:

438197, 438270

Abstract:

A vertical conduction MOSFET semiconductor device is formed in a non-epitaxial (float zone) lightly doped silicon substrate. Device junction regions are formed in the top surface of the lightly doped float zone substrate. The backside of the wafer is then ground by surface grinding to attain a desired thickness. Phosphorus, or another N type dopant species, is then implanted into the back surface and is activated by a laser anneal. Back surface damage caused by grinding and/or implantation is intentionally retained. Alternatively, a âtransparentâ layer is formed by depositing highly doped amorphous silicon on the back surface. Titanium, or another metal (excluding aluminum), is then deposited on the back surface and annealed to form a titanium silicide, or other silicide for a contact electrode.

US Patent:

6482681, Nov 19, 2002

Filed:

May 5, 2000

Appl. No.:

09/565922

Inventors:

Richard Francis - Manhattan Beach CA
Chiu Ng - El Segundo CA

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H01L 21332

US Classification:

438138, 438137, 438520, 438528

Abstract:

An IGBT is formed in a thin (less than 250 microns thick) float zone silicon wafer using a hydrogen implant to form an N buffer layer at the bottom of the wafer. A weak anode is formed on the bottom of the wafer. A single hydrogen implant, or a plurality of hydrogen implants of progressively shallower depth and increasing dose can be used to form the implant in a diffused float zone wafer. The process may also be used to form an N contact region in silicon to permit a good ohmic contact to the silicon for any type device.

US Patent:

6603153, Aug 5, 2003

Filed:

May 21, 2001

Appl. No.:

09/862017

Inventors:

Richard Francis - Manhattan Beach CA
Chiu Ng - El Segundo CA

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H01L 29861

US Classification:

257104, 257106, 257107, 257121, 257143, 257149, 257175, 257528, 257551, 257601, 257656, 257910

Abstract:

A soft recovery diode is made by first implanting helium into the die to a location below the P/N junction and the implant annealed. An E-beam radiation process then is applied to the entire wafer and is also annealed. The diode then has very soft recovery characteristics without requiring heavy metal doping.

US Patent:

6627961, Sep 30, 2003

Filed:

May 5, 2000

Appl. No.:

09/565151

Inventors:

Richard Francis - Manhattan Beach CA
Ranadeep Dutta - Redondo Beach CA
Chiu Ng - El Segundo CA
Peter Wood - Rolling Hills Estates CA

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H01L 2972

US Classification:

257378, 257379, 257391, 257544

Abstract:

A high voltage MOSgated semiconductor device has a generally linear MOSFET type forward current versus forward voltage characteristic at low voltage and the high current, low forward drop capability of an IGBT. The device is particularly useful as the control transistor for a television tube deflection coil. The device is formed by a copacked discrete IGBT die and power MOSFET die in which the ratio of the MOSFET die area is preferably about 25% that of the IGBT. Alternatively, the IGBT and MOSFET can be integrated into the same die, with the IGBT and MOSFET elements alternating laterally with one another and overlying respective P injection regions and N contact regions respectively on the bottom of the die. The MOSFET and IGBT elements are preferably spaced apart by a distance of about 1 minority carrier length (50-100 microns for a 1500 volt device).

US Patent:

6683331, Jan 27, 2004

Filed:

Apr 25, 2002

Appl. No.:

10/132549

Inventors:

Richard Francis - Manhattan Beach CA
Chiu Ng - El Segundo CA

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H01L 2974

US Classification:

257163, 257330

Abstract:

An IGBT has parallel spaced trenches lined with gate oxide and filled with conductive polysilicon gate bodies. The trenches extend through a P base region which is about 7 microns deep. A deep narrow N emitter diffusion is at the top of the trench and a shallow P contact diffusion extends between adjacent emitter diffusions. The N emitter diffusions are arranged to define a minimum R. The trenches are sufficiently deep to define long channel regions which can withstand a substantial portion of the blocking voltage of the device. A second blanket emitter implant and diffusion defines a shallow high concentration emitter diffusion extension at the top of the die for improved contact to the emitter diffusions.

US Patent:

6707111, Mar 16, 2004

Filed:

Aug 13, 2002

Appl. No.:

10/217988

Inventors:

Richard Francis - Manhattan Beach CA
Chiu Ng - El Segundo CA

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H01L 2362

US Classification:

257362

Abstract:

An IGBT is formed in a thin (less than 250 microns thick) float zone silicon wafer using a hydrogen implant to form an N buffer layer at the bottom of the wafer. A weak anode is formed on the bottom of the wafer. A single hydrogen implant, or a plurality of hydrogen implants of progressively shallower depth and increasing dose can be used to form the implant in a diffused float zone wafer. The process may also be used to form an N contact region in silicon to permit a good ohmic contact to the silicon for any type device.

US Patent:

6753580, Jun 22, 2004

Filed:

May 5, 2000

Appl. No.:

09/565148

Inventors:

Richard Francis - Manhattan Beach CA
Chiu Ng - El Segundo CA
Fabrizio Ruo Redda - Caselle, IT

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H01L 2976

US Classification:

257367, 257 88, 257 40, 257471, 257474

Abstract:

A diode is formed having a weak injection shallow, low P concentration anode in an N type wafer or die. The resulting diode has a soft reverse recovery characteristic with low recovery voltage and is particularly useful either as a power factor correction diode or as an antiparallel connected diode in a motor control circuit.

US Patent:

6919248, Jul 19, 2005

Filed:

Mar 14, 2003

Appl. No.:

10/389857

Inventors:

Richard Francis - Manhattan Beach CA, US
Chiu Ng - El Segundo CA, US

Assignee:

International Rectifier Corporation - El Segundo CA

International Classification:

H01L021/336
H01L021/425

US Classification:

438270, 438524, 438589

Abstract:

An insulated gate trench type semiconductor device having L-shaped diffused regions, each diffused region having a vertically oriented portion and a horizontally oriented portion extending laterally from the vertically oriented portion, and a method for manufacturing the device in which the vertically oriented portion of each L-shaped diffused region is formed by directing dopants at an angle toward a sidewall of a trench to form the vertically oriented portion using the edge of the opposing sidewall of the trench as a mask.