Christian M Wetzel

US Patent:

20110117376, May 19, 2011

Filed:

Nov 16, 2010

Appl. No.:

12/947409

Inventors:

Mingwei Zhu - Sunnyvale CA, US
Theeradetch Detchprohm - Niskayuna NY, US
Christian Wetzel - Troy NY, US

International Classification:

C30B 25/18
B32B 15/04

US Classification:

428457, 117 88

Abstract:

The current invention introduces a method of crystal film's growth of Gallium Nitride and related alloys over a novel class of the substrates using Vapor Phase Epitaxy technique. This said novel class of the substrates comprises single crystal lattice matched, partially matched or mismatched metallic substrates. The use of such substrates provides exceptional thermal conductivity and application flexibility, since they can be easily removed or patterned by chemical etching for the purposes of additional contact formation, electromagnetic radiation extraction, packaging or other purposes suggested or discovered by the skilled artisan. In particular, if patterned, the remaining portions of the said substrates can be utilized as contacts to the semiconductor layers grown on them. In addition, the said metallic substrates are significantly more cost effective than most of the conventional substrates. The use of Vapor Phase Epitaxy allows growing the epitaxial layers with different and/or variable alloy composition, as well as heterostructures and superlattices.

US Patent:

20110254134, Oct 20, 2011

Filed:

Apr 15, 2011

Appl. No.:

13/087614

Inventors:

Theeradetch Detchprohm - Niskayuna NY, US
Mingwei Zhu - Santa Clara CA, US
Christian Wetzel - Troy NY, US

International Classification:

H01L 29/20
B32B 38/10
C30B 25/02

US Classification:

257615, 117104, 156701, 257E29089

Abstract:

The non-polar or semi-polar Nitride film is grown using Metal Organic Vapor Phase Epitaxy over a substrate. The in-situ grown seed layer comprising Magnesium and Nitrogen is deposited prior to the Nitride film growth. The said seed layer enhances the crystal growth of the Nitride material and makes it suitable for electronics and optoelectronics applications. The use of non-polar and/or semi-polar epitaxial films of the Nitride materials allows avoiding the unwanted effects related to polarization fields and associated interface and surface charges, thus significantly improving the semiconductor device performance and efficiency. In addition, the said seed layer is also easily destroyable by physical or chemical stress, including the ability to dissolve in water or acid, which makes the substrate removal process available and easy. The substrate removal provides the possibility to achieve exceptional thermal conductivity and application flexibility, such as additional contact formation, electromagnetic radiation extraction, packaging or other purposes suggested or discovered by the skilled artisan.

US Patent:

20120032210, Feb 9, 2012

Filed:

Aug 3, 2011

Appl. No.:

13/197671

Inventors:

Alexei Koudymov - Troy NY, US
Christian Martin Wetzel - Troy NY, US

International Classification:

H01L 33/20

US Classification:

257 94, 257E33048

Abstract:

The present invention introduces the novel, improved design approach of the semiconductor devices that utilize the effect of carrier recombination, for example, to produce the electromagnetic radiation. The approach is based on the separate control over the injection of the electrons and holes into the active region of the device. As a result, better recombination efficiencies can be achieved, and the effect of the wavelength shift of the produced radiation can be eliminated. The devices according to the present invention outperform existing solid state light and electromagnetic radiation sources and can be used in any applications where solid state light sources are currently involved, as well as any applications future discovered.

US Patent:

20120052679, Mar 1, 2012

Filed:

Aug 31, 2011

Appl. No.:

13/222800

Inventors:

Wenting Hou - Troy NY, US
Theeradetch Detchprohm - Niskayuna NY, US
Christian Martin Wetzel - Troy NY, US

International Classification:

H01L 21/28

US Classification:

438660, 257E21158

Abstract:

A method of providing a metal contact to n-type Gallium Nitride is disclosed. The method does not require high temperatures that often lead to a degradation of semiconductor materials, dielectric films, interfaces and/or metal-semiconductor junctions. The method can be applied at practically any step of a semiconductor device fabrication process and results in high quality ohmic contact with low contact resistance and high current handling capability. Present invention significantly simplifies the fabrication process of semiconductor devices, such as Gallium Nitride-based Light Emitting Diodes and Laser Diodes, while improving the resulting performance of the said devices. The invention can also be applied to improve the performance of electronic devices based on Gallium Nitride material system, especially where an additional annealing step is beneficial during the fabrication process.

US Patent:

20110042709, Feb 24, 2011

Filed:

Aug 17, 2010

Appl. No.:

12/857760

Inventors:

Christoph Stark - Troy NY, US
Christian Wetzel - Troy NY, US
Theeradetch Detchprohm - Niskayuna NY, US

International Classification:

H01L 33/62

US Classification:

257 99, 257E33066

Abstract:

The current invention introduces a semiconductor light emitting device mounted in a free-standing way for enhanced light extraction and handling simplicity. The free-standing mount is based on the mechanical strength of the current carrying connectors, such as wires or bonds. Such mounted LED die can be placed into standard light bulb body for compatibility with existing household, car, consumer electronics or industrial light sources. The current invention provides increased light extraction efficiency which makes general LED lighting simpler and cheaper. The mounting into a conventional light bulb provides the consumer with the ease of handling and mounting.

US Patent:

20200006597, Jan 2, 2020

Filed:

Sep 11, 2019

Appl. No.:

16/567535

Inventors:

- Albuquerque NM, US
Seung-Chang Lee - Albuquerque NM, US
Christian Wetzel - Troy NY, US
Mark Durniak - Troy NY, US

International Classification:

H01L 33/32
H01L 21/02
H01L 21/78
H01L 33/00
H01L 33/04
H01L 33/18
H01L 29/04

Abstract:

A method of forming a semiconductor structure includes providing a substrate comprising a first material portion and a single crystal silicon layer on the first material portion. The substrate further comprises a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface. A buffer layer is deposited in one or more of the plurality of grooves. A semiconductor material is epitaxially grown over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase.

US Patent:

20190103481, Apr 4, 2019

Filed:

Nov 14, 2018

Appl. No.:

16/191197

Inventors:

- Albuquerque NM, US
Seung-Chang Lee - Albuquerque NM, US
Christian Wetzel - Troy NY, US
Mark Durniak - Troy NY, US

International Classification:

H01L 29/778
H01L 29/78
H01L 29/08
H01L 29/06
H01L 21/02
H01S 5/32
H01L 29/04
H01L 29/66
H01L 29/423
H01L 29/205
H01S 5/343
H01L 33/00
H01S 5/02
H01L 33/24
H01L 29/40
H01S 5/227
H01S 5/22
H01L 33/32

Abstract:

A transistor comprises a substrate comprising a Group III/V compound semiconductor material having a cubic crystalline phase structure positioned on a hexagonal crystalline phase layer having a first region and a second region, the cubic crystalline phase structure being positioned between the first region and the second region of the hexagonal crystalline phase layer. A source region and a drain region are both positioned in the Group III/V compound semiconductor material. A channel region is in the Group III/V compound semiconductor material. A gate is over the channel region. An optional backside contact can also be formed. A source contact and electrode are positioned to provide electrical contact to the source region. A drain contact and electrode are positioned to provide electrical contact to the drain region. Methods of forming transistors are also disclosed.

US Patent:

20170194476, Jul 6, 2017

Filed:

Mar 22, 2017

Appl. No.:

15/466461

Inventors:

- Albuquerque NM, US
Seung-Chang Lee - Albuquerque NM, US
Christian Wetzel - Troy NY, US
Mark Durniak - Troy NY, US

International Classification:

H01L 29/778
H01L 21/02
H01L 29/08
H01L 29/66
H01L 29/205
H01L 29/04
H01L 21/306

Abstract:

A transistor comprises a substrate comprising a Group III/V compound semiconductor material having a cubic crystalline phase structure positioned on a hexagonal crystalline phase layer having a first region and a second region, the cubic crystalline phase structure being positioned between the first region and the second region of the hexagonal crystalline phase layer. A source region and a drain region are both positioned in the Group III/V compound semiconductor material. A channel region is in the Group III/V compound semiconductor material. A gate is over the channel region. An optional backside contact can also be formed. A source contact and electrode are positioned to provide electrical contact to the source region. A drain contact and electrode are positioned to provide electrical contact to the drain region. Methods of forming transistors are also disclosed.