Christine C Fuller

US Patent:

57610789, Jun 2, 1998

Filed:

Mar 21, 1996

Appl. No.:

8/618060

Inventors:

Christine Marie Fuller - Chittenden VT
Scott Whitney Gould - Chittenden VT
Steven Paul Hartman - Chittenden VT
Eric Ernest Millham - Chittenden VT
Gulsun Yasar - Chittenden VT

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1750

US Classification:

364489

Abstract:

A computer implemented method for the automated placement and routing in the design of field programmable gate arrays achieves optimal timing. In a library of primitives and macros from which a designer may choose to implement a given circuit design, at least some of said macros are "semi-hard" macros where direct connections and relative placements are specified while local bus routing is requested in a manner that does not restrict macro placement. A logical netlist containing references to macros and how to connect them together to perform a logical function is first created. The logical netlist is then translated to a physical netlist using a mapper function. This physical netlist for the semi-hard macros specifies what is to be connected but not how. The best place to put each macro on the field programmable gate array is found using a placer function. The placer function thus determines an absolute position of the macros.