Christopher R Ackerman

US Patent:

20080302783, Dec 11, 2008

Filed:

Jun 8, 2007

Appl. No.:

11/811307

Inventors:

Anthony Yeh Chiing Wong - Pulau Penang, MY
Christopher Wade Ackerman - Phoenix AZ, US
James C. Shipley - Gilbert AZ, US
Hon Lee Kon - Penang, MY

International Classification:

H05B 1/02
G01R 31/28

US Classification:

219494, 219482, 219484, 324755, 324760, 324765

Abstract:

In one embodiment, a test board includes a plurality of socket locations each to receive a corresponding burn-in socket which in turn is to receive a semiconductor device under test (DUT). Each of the socket locations includes a heating element embedded within the test board, which may be used to provide thermal conduction to the DUT during a burn-in test. Other embodiments are described and claimed.

US Patent:

20090002010, Jan 1, 2009

Filed:

Jun 26, 2007

Appl. No.:

11/821864

Inventors:

Anthony Yeh Chiing Wong - Pulau Pinang, MY
Victor Henckel - Seattle WA, US
Boon Liang Heng - Kuala Lumpur, MY
Christopher Wade Ackerman - Phoenix AZ, US
James C. Shipley - Gilbert AZ, US

International Classification:

G01R 31/02

US Classification:

324760

Abstract:

In one embodiment, the present invention includes a burn-socket for insertion into a test board, where the burn-in socket is coupled to receive a semiconductor device under test (DUT). The burn-in socket includes a substrate to support the semiconductor DUT, which includes a heating element embedded in a layer of the substrate. Other embodiments are described and claimed.

US Patent:

20110109335, May 12, 2011

Filed:

Nov 6, 2009

Appl. No.:

12/590379

Inventors:

Christopher R. Schroeder - Gilbert AZ, US
Christopher W. Ackerman - Phoenix AZ, US
James C. Shipley - Gilbert AZ, US
Tolga Acikalin - Chandler AZ, US
Ioan Sauciuc - Phoenix AZ, US
Michael L. Rutigliano - Chandler AZ, US
James G. Maveety - Campbell CA, US
Ashish X. Gupta - Chandler AZ, US

International Classification:

G01R 31/26
F28D 15/00
G01R 31/10

US Classification:

32475008, 16510431, 16510433, 32476201

Abstract:

An apparatus to test a semiconductive device includes a base plane that holds at least one heat-transfer fluid unit cell. The at least one heat-transfer fluid unit cell includes a fluid supply structure including a supply-orifice cross section as well as a fluid return structure including a return-orifice cross section. The supply-orifice cross section is greater than the return-orifice cross section. A die interface is also included to be a liquid-impermeable material.

US Patent:

20200146183, May 7, 2020

Filed:

Nov 5, 2018

Appl. No.:

16/180499

Inventors:

- Santa Clara CA, US
Joseph Petrini - Gilbert AZ, US
Todd Coons - Gilbert AZ, US
Christopher Wade Ackerman - Phoenix AZ, US
Edvin Cetegen - Chandler AZ, US
Yang Jiao - Chandler AZ, US
Michael Rutigliano - Chandler AZ, US
Kuang Liu - Queen Creek AZ, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H05K 7/20

Abstract:

A conformable heat sink interface for an integrated circuit package comprises a mounting plate having a first surface and a deformable membrane having a portion bonded to a second surface of the plate. A cavity is between the second surface of the plate and the deformable membrane. A flowable heat transfer medium is within the cavity. The flowable heat transfer medium has a thermal conductivity of not less than 30 W/m K. The deformable membrane is to conform to a three-dimensional shape of an IC package and the mounting plate has a second surface that is to be adjacent to a heat sink base.

US Patent:

20190223324, Jul 18, 2019

Filed:

Mar 28, 2019

Appl. No.:

16/368341

Inventors:

- Santa Clara CA, US
Thomas Boyd - Vancouver WA, US
Bijoyraj Sahu - Portland OR, US
Evan Chenelly - Portland OR, US
Christopher Wade Ackerman - Phoenix AZ, US
Carlos Alvizo Flores - Zapopan, MX
Craig Jahne - Beaverton OR, US

International Classification:

H05K 7/20

Abstract:

Systems, apparatuses, methods, and computer-readable media are presented for managing an apparatus for thermal energy management including a first container. The first container includes a first cavity, and is configured to hold a first liquid coolant within the first cavity to at least partially surround a second container. The second container includes a second cavity configured to hold one or more heat sources, and a second liquid coolant to at least partially surround the one or more heat sources. The second container is sealed to separate the first liquid coolant from the second liquid coolant. Other embodiments may be described and/or claimed.

US Patent:

20180156863, Jun 7, 2018

Filed:

Dec 2, 2016

Appl. No.:

15/367415

Inventors:

- Santa Clara CA, US
James R. Hastings - Chandler AZ, US
Akhilesh P. Rallabandi - Gilbert AZ, US
Morten S. Jensen - Messa AZ, US
Christopher Wade Ackerman - Phoenix AZ, US
Christopher R. Schroeder - Gilbert AZ, US
Nader N. Abazarnia - Chandler AZ, US
John C. Johnson - Phoenix AZ, US

International Classification:

G01R 31/28
H05B 6/10

Abstract:

Techniques for thermal management of a device under test are discussed. In an example, an apparatus may include a pedestal having a device-specific surface configured to exchange heat with the integrated circuit while the device-specific surface is in contact with a surface of the integrated circuit or separated from the surface of the integrated circuit by a layer of thermally conductive material, and a heat generating element configured to heat the device-specific surface. In certain examples, the pedestal may include a plurality of channels configured to couple to a manifold and to route thermal material from the manifold through an interior of the pedestal for maintaining temperature control of the surface of an integrated circuit under test.

US Patent:

20150285857, Oct 8, 2015

Filed:

Jun 22, 2015

Appl. No.:

14/746764

Inventors:

- Santa Clara CA, US
Christopher W. ACKERMAN - Phoenix AZ, US
James C. SHIPLEY - Gilbert AZ, US
Tolga ACIKALIN - San Jose CA, US
Ioan SAUCIUC - Phoenix AZ, US
Michael L. RUTIGLIANO - Chandler AZ, US
James G. MAVEETY - Campbell CA, US
Ashish GUPTA - Chandler AZ, US

International Classification:

G01R 31/28
G01R 31/26

Abstract:

An apparatus to test a semiconductive device includes a base plane that holds at least one heat-transfer fluid unit cell. The at least one heat-transfer fluid unit cell includes a fluid supply structure including a supply-orifice cross section as well as a fluid return structure including a return-orifice cross section. The supply-orifice cross section is greater than the return-orifice cross section. A die interface is also included to be a liquid-impermeable material.